amaranth-boards - Board definitions for Amaranth HDL

Age	Commit message (Collapse)	Author
2020-08-15	Use correct IO attribute for ECP5 FPGAs	Oguz Meteer
	This changes several incorrect IO_STANDARD attributes to IO_TYPE. Signed-off-by: Oguz Meteer <info@guztech.nl>
2020-08-07	versa_ecp5: Fix DDR3 IO types, using the types from Lattice's DDR3 demo lpf	Jean THOMAS

2020-07-16	[breaking-change] Update SPI pin names.	ECP5-PCIe
	The new names follow the OSHWA convention described at: https://www.oshwa.org/a-resolution-to-redefine-spi-signal-names/
2020-02-06	versa_ecp5: fix switch{4..7} IO_TYPE.	whitequark

2019-10-03	Reorganize resource taxonomy.	whitequark
	The current hierarchy isn't particularly well suited to resources like SDRAM or NOR flash, so make it much less fine-grained but easier to use and less nitpicky.
2019-09-23	_blinky→test.blinky	whitequark
	Expose blinky as a stable component, to make writing out-of-tree board files a bit nicer.
2019-09-23	[breaking-change] Factor out "led", "button" and "switch" resources.	whitequark
	These resources were renamed as: * user_led → led * user_btn → button * user_sw → switch Fixes #13.
2019-08-21	versa_ecp5: prepare for switchable ECP5 toolchains.	whitequark

2019-08-04	Remove useless _blinky.build_and_program() function.	whitequark

2019-08-03	Update all boards to use default_rst.	whitequark
	This is pretty much just Versa ECP5 (5G).
2019-08-03	Update all boards to use default_clk.	whitequark

2019-08-03	Replace subprocess.run(..., check=True) with subprocess.check_call().	whitequark

2019-07-05	versa_ecp5: add missing pin directions.	whitequark
	Fixes #16.
2019-06-28	[breaking-change] Factor out "serial" resource and rename to "uart".	whitequark
	Also, add missing pullups where appropriate.
2019-06-25	Add Versa ECP5/ECP5-5G support.	whitequark