From 130123d28dc0d16faab6a02fd07eea4dbb6d43fb Mon Sep 17 00:00:00 2001
From: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
Date: Fri, 5 May 2023 17:41:49 +0200
Subject: cmod_a7: toolchain_program: use board name instead of cable + FPGA
 version

---
 amaranth_boards/cmod_a7.py | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/amaranth_boards/cmod_a7.py b/amaranth_boards/cmod_a7.py
index adc11e0..7f62c60 100644
--- a/amaranth_boards/cmod_a7.py
+++ b/amaranth_boards/cmod_a7.py
@@ -77,8 +77,7 @@ class _CmodA7Platform(XilinxPlatform):
     def toolchain_program(self, products, name):
         with products.extract("{}.bit".format(name)) as bitstream_filename:
             subprocess.check_call(["openFPGALoader",
-                "-c", "digilent",
-                "--fpga-part", "xc7a35",
+                "-b", "cmoda7_35t",
                 "{}".format(bitstream_filename)
             ])
 
-- 
cgit v1.2.3