From ec65568d91dca4ca2ff7da22b90ad6574bbad68a Mon Sep 17 00:00:00 2001 From: awygle Date: Wed, 4 Nov 2020 22:52:12 -0800 Subject: Factor out I2C resource. --- nmigen_boards/genesys2.py | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'nmigen_boards/genesys2.py') diff --git a/nmigen_boards/genesys2.py b/nmigen_boards/genesys2.py index 40dbced..1c4ee54 100644 --- a/nmigen_boards/genesys2.py +++ b/nmigen_boards/genesys2.py @@ -52,10 +52,8 @@ class Genesys2Platform(Xilinx7SeriesPlatform): Attrs(IOSTANDARD="LVCMOS33")), UARTResource(0, rx="Y20", tx="Y23", attrs=Attrs(IOSTANDARD="LVCMOS33")), - Resource("i2c", 0, - Subsignal("scl", Pins("AE30", dir="io")), - Subsignal("sda", Pins("AF30", dir="io")), - Attrs(IOSTANDARD="LVCMOS33")), + I2CResource(0, scl="AE30", sda="AF30", + attrs=Attrs(IOSTANDARD="LVCMOS33")), Resource("ddr3", 0, Subsignal("rst", PinsN("AG5", dir="o"), Attrs(IOSTANDARD="SSTL15")), -- cgit v1.2.3