From 08b1b955b1fba1f776ff233a23eb98526a8d0c39 Mon Sep 17 00:00:00 2001 From: "S.J.R. van Schaik" Date: Mon, 31 May 2021 04:51:32 -0400 Subject: [breaking-change] Factor out VGAResource. --- nmigen_boards/mister.py | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'nmigen_boards/mister.py') diff --git a/nmigen_boards/mister.py b/nmigen_boards/mister.py index d961a3d..9d08cff 100644 --- a/nmigen_boards/mister.py +++ b/nmigen_boards/mister.py @@ -93,13 +93,13 @@ class MisterPlatform(IntelPlatform): conn=("gpio", 1), attrs=Attrs(io_standard="3.3-V LVTTL")), # The schematic is difficult to understand here... - Resource("vga", 0, - Subsignal("r", Pins("28 32 34 36 38 40", dir="o", conn=("gpio", 1))), - Subsignal("g", Pins("27 31 33 35 37 39", dir="o", conn=("gpio", 1))), - Subsignal("b", Pins("21 23 25 26 24 24", dir="o", conn=("gpio", 1))), - Subsignal("hs", Pins("20", dir="o", conn=("gpio", 1))), - Subsignal("vs", Pins("19", dir="o", conn=("gpio", 1))), - Attrs(io_standard="3.3-V LVTTL")) + VGAResource(0, + r="28 32 34 36 38 40", + g="27 31 33 35 37 39", + b="21 23 25 26 24 24", + hs="20", vs="19", + conn=("gpio", 1), + attrs=Attrs(io_standard="3.3-V LVTTL")) ] connectors = [ # Located on the top of the board, above the chip. -- cgit v1.2.3