From 25e247c5dec7f0bbec97a50a549e2fd97961a9bb Mon Sep 17 00:00:00 2001 From: whitequark Date: Fri, 11 Oct 2019 14:46:30 +0000 Subject: resources: add conn= argument to every factory. --- nmigen_boards/resources/interface.py | 56 +++++++++++++++++++----------------- 1 file changed, 29 insertions(+), 27 deletions(-) (limited to 'nmigen_boards/resources/interface.py') diff --git a/nmigen_boards/resources/interface.py b/nmigen_boards/resources/interface.py index 7ab0518..655faf6 100644 --- a/nmigen_boards/resources/interface.py +++ b/nmigen_boards/resources/interface.py @@ -5,68 +5,70 @@ __all__ = ["UARTResource", "IrDAResource", "SPIResource"] def UARTResource(*args, rx, tx, rts=None, cts=None, dtr=None, dsr=None, dcd=None, ri=None, - attrs=None): + conn=None, attrs=None): io = [] - io.append(Subsignal("rx", Pins(rx, dir="i", assert_width=1))) - io.append(Subsignal("tx", Pins(tx, dir="o", assert_width=1))) + io.append(Subsignal("rx", Pins(rx, dir="i", conn=conn, assert_width=1))) + io.append(Subsignal("tx", Pins(tx, dir="o", conn=conn, assert_width=1))) if rts is not None: - io.append(Subsignal("rts", Pins(rts, dir="o", assert_width=1))) + io.append(Subsignal("rts", Pins(rts, dir="o", conn=conn, assert_width=1))) if cts is not None: - io.append(Subsignal("cts", Pins(cts, dir="i", assert_width=1))) + io.append(Subsignal("cts", Pins(cts, dir="i", conn=conn, assert_width=1))) if dtr is not None: - io.append(Subsignal("dtr", Pins(dtr, dir="o", assert_width=1))) + io.append(Subsignal("dtr", Pins(dtr, dir="o", conn=conn, assert_width=1))) if dsr is not None: - io.append(Subsignal("dsr", Pins(dsr, dir="i", assert_width=1))) + io.append(Subsignal("dsr", Pins(dsr, dir="i", conn=conn, assert_width=1))) if dcd is not None: - io.append(Subsignal("dcd", Pins(dcd, dir="i", assert_width=1))) + io.append(Subsignal("dcd", Pins(dcd, dir="i", conn=conn, assert_width=1))) if ri is not None: - io.append(Subsignal("ri", Pins(ri, dir="i", assert_width=1))) + io.append(Subsignal("ri", Pins(ri, dir="i", conn=conn, assert_width=1))) if attrs is not None: io.append(attrs) return Resource.family(*args, default_name="uart", ios=io) -def IrDAResource(number, *, rx, tx, en=None, sd=None, attrs=None): +def IrDAResource(number, *, rx, tx, en=None, sd=None, + conn=None, attrs=None): # Exactly one of en (active-high enable) or sd (shutdown, active-low enable) should # be specified, and it is mapped to a logic level en subsignal. assert (en is not None) ^ (sd is not None) io = [] - io.append(Subsignal("rx", Pins(rx, dir="i", assert_width=1))) - io.append(Subsignal("tx", Pins(tx, dir="o", assert_width=1))) + io.append(Subsignal("rx", Pins(rx, dir="i", conn=conn, assert_width=1))) + io.append(Subsignal("tx", Pins(tx, dir="o", conn=conn, assert_width=1))) if en is not None: - io.append(Subsignal("en", Pins(en, dir="o", assert_width=1))) + io.append(Subsignal("en", Pins(en, dir="o", conn=conn, assert_width=1))) if sd is not None: - io.append(Subsignal("en", PinsN(sd, dir="o", assert_width=1))) + io.append(Subsignal("en", PinsN(sd, dir="o", conn=conn, assert_width=1))) if attrs is not None: io.append(attrs) return Resource("irda", number, *io) -def SPIResource(*args, cs, clk, mosi, miso, int=None, reset=None, attrs=None, role="host"): +def SPIResource(*args, cs, clk, mosi, miso, int=None, reset=None, + conn=None, attrs=None, role="host"): assert role in ("host", "device") io = [] if role == "host": - io.append(Subsignal("cs", PinsN(cs, dir="o"))) - io.append(Subsignal("clk", Pins(clk, dir="o", assert_width=1))) - io.append(Subsignal("mosi", Pins(mosi, dir="o", assert_width=1))) - io.append(Subsignal("miso", Pins(miso, dir="i", assert_width=1))) + io.append(Subsignal("cs", PinsN(cs, dir="o", conn=conn))) + io.append(Subsignal("clk", Pins(clk, dir="o", conn=conn, assert_width=1))) + io.append(Subsignal("mosi", Pins(mosi, dir="o", conn=conn, assert_width=1))) + io.append(Subsignal("miso", Pins(miso, dir="i", conn=conn, assert_width=1))) else: # device - io.append(Subsignal("cs", PinsN(cs, dir="i", assert_width=1))) - io.append(Subsignal("clk", Pins(clk, dir="i", assert_width=1))) - io.append(Subsignal("mosi", Pins(mosi, dir="i", assert_width=1))) - io.append(Subsignal("miso", Pins(miso, dir="oe", assert_width=1))) + io.append(Subsignal("cs", PinsN(cs, dir="i", conn=conn, assert_width=1))) + io.append(Subsignal("clk", Pins(clk, dir="i", conn=conn, assert_width=1))) + io.append(Subsignal("mosi", Pins(mosi, dir="i", conn=conn, assert_width=1))) + io.append(Subsignal("miso", Pins(miso, dir="oe", conn=conn, assert_width=1))) if int is not None: if role == "host": - io.append(Subsignal("int", Pins(int, dir="i"))) + io.append(Subsignal("int", Pins(int, dir="i", conn=conn))) else: - io.append(Subsignal("int", Pins(int, dir="oe", assert_width=1))) + io.append(Subsignal("int", Pins(int, dir="oe", conn=conn, assert_width=1))) if reset is not None: if role == "host": - io.append(Subsignal("reset", Pins(reset, dir="o"))) + io.append(Subsignal("reset", Pins(reset, dir="o", conn=conn))) else: - io.append(Subsignal("reset", Pins(reset, dir="i", assert_width=1))) + io.append(Subsignal("reset", Pins(reset, dir="i", conn=conn, assert_width=1))) if attrs is not None: io.append(attrs) return Resource.family(*args, default_name="spi", ios=io) -- cgit v1.2.3