From 08b1b955b1fba1f776ff233a23eb98526a8d0c39 Mon Sep 17 00:00:00 2001 From: "S.J.R. van Schaik" Date: Mon, 31 May 2021 04:51:32 -0400 Subject: [breaking-change] Factor out VGAResource. --- nmigen_boards/rz_easyfpga_a2_2.py | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) (limited to 'nmigen_boards/rz_easyfpga_a2_2.py') diff --git a/nmigen_boards/rz_easyfpga_a2_2.py b/nmigen_boards/rz_easyfpga_a2_2.py index 3f6ee08..892b546 100644 --- a/nmigen_boards/rz_easyfpga_a2_2.py +++ b/nmigen_boards/rz_easyfpga_a2_2.py @@ -41,13 +41,9 @@ class RZEasyFPGAA2_2Platform(IntelPlatform): dqm="42 55", attrs=Attrs(io_standard="3.3-V LVCMOS")), # VGA connector, located on the right of the board. - Resource("vga", 0, - Subsignal("r", Pins("106", dir="o")), - Subsignal("g", Pins("105", dir="o")), - Subsignal("b", Pins("104", dir="o")), - Subsignal("hs", Pins("101", dir="o")), - Subsignal("vs", Pins("103", dir="o")), - ), + VGAResource(0, + r="106", g="105", b="104", + hs="101", vs="103"), # 4 digit 7 segment display, located on top of the board. Display7SegResource(0, -- cgit v1.2.3