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2018-05-30Allow prefixes in multiple chained statements.Tim 'mithro' Ansell
IE ``` lutff_1 { lutff_1/out -> local_g2_1 -> lutff_1/in_0 local_g2_2 -> lutff_1/in_3 local_g2_7 -> lutff_1/in_2 } ```
2018-05-30Support both `abc/123` and `123` forms of specifying tracks.Tim 'mithro' Ansell
Kind of fixes #145.
2018-05-13Merge pull request #139 from awygle/lm_iceboxClifford Wolf
Icebox support for ice40 LM
2018-05-13Extact reproducable chipdb-5k.txtClifford Wolf
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-05-13Add chipdb-lm4k.txt to .gitignoreAndrew Wygle
2018-05-13Correct internal global buffers for lm4kAndrew Wygle
2018-05-13Added missing ieren entries for lm4k.Andrew Wygle
Config SPI pins weren't present in ioctrl_lm4k.sh
2018-05-13Add lm4k chipdb to icebox Makefile.Andrew Wygle
2018-05-13Support lm4k in icebox_chipdb.py.Andrew Wygle
2018-05-12Completed first pass at icebox support for lm4k.Andrew Wygle
Needs testing.
2018-05-12[WIP] Added colbuf and gbufin data for LM seriesAndrew Wygle
2018-05-12[WIP] Add partial icebox support for lm4k.Andrew Wygle
2018-04-02Add BG121 package variant and update docsDavid Shah
2018-02-09Add UltraPlus I³C IO to chipdbDavid Shah
2018-02-09Add RGB driver outputs to chipdbDavid Shah
2018-01-16Add 5k UWG30 ieren data to dbDavid Shah
2018-01-16Remove seperate 5k RAM DB and share with 8k insteadDavid Shah
This should ensure that the 5k RAM routing entries are now complete, fixing #115
2018-01-16Add pinout for 5k UWG30 packageDavid Shah
2018-01-16HFOSC trimming infoDavid Shah
2018-01-16New UltraPlus corner tracing algorithmDavid Shah
2018-01-16Misc routing tweaksDavid Shah
2018-01-16Figure out missing SPI config bits, and add to chipdbDavid Shah
2017-11-26Chipdb fix for hard IPDavid Shah
2017-11-24Add UltraPlus IP to chipdbDavid Shah
2017-11-23Begin I2C/SPI IP reverse engineeringDavid Shah
2017-11-20Fix whitespace and a couple of typosDavid Shah
2017-11-18Add all cf_bits and pullup strength notesDavid Shah
2017-11-17Add missing 5k BRAM bitsDavid Shah
2017-11-17Make 5k db as a default targetDavid Shah
2017-11-17Remove non-existing routing resources (5k)David Shah
2017-11-17Add support for UltraPlus SPRAMDavid Shah
2017-11-17Add UltraPlus LED driver support and demoDavid Shah
2017-11-17UltraPlus Internal Oscillator supportDavid Shah
2017-11-17UltraPlus DSPs workingDavid Shah
2017-11-17Add new tile types and MAC16s to chipdbDavid Shah
2017-11-17Tidy up some of the icebox changesDavid Shah
2017-11-17Fix 5k corner routing, and reverse engineer SPRAMDavid Shah
2017-11-17Start UltraPlus DSP documentationDavid Shah
2017-11-17Trace DSP routingDavid Shah
2017-11-06Fix 5k gbin configurationDavid Shah
2017-11-05Add more 5k RAM bits to dbDavid Shah
2017-11-05Fix 5k padin_glb_netwk bitsDavid Shah
2017-11-01Fix global network 1 padin bitDavid Shah
2017-11-01Work on 5k global buffer padsDavid Shah
2017-10-31Add missing up5k global buffer padsDavid Shah
2017-10-31Working up5k PLL supportDavid Shah
2017-10-31Fix loading 5k asc filesDavid Shah
2017-10-29Add new 5k IO config bits to databaseDavid Shah
2017-10-29Share glb_netwk data between 5k and 8k partsDavid Shah
2017-10-25Fix global network data for up5kDavid Shah
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