| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2018-01-16 | Remove seperate 5k RAM DB and share with 8k instead | David Shah | |
| This should ensure that the 5k RAM routing entries are now complete, fixing #115 | |||
| 2017-11-17 | Trace DSP routing | David Shah | |
| 2017-06-22 | Add icefuzz support for the UP5K and rework underlying device specification ↵ | Scott Shawcroft | |
| for more flexibility. | |||
| 2015-08-22 | icefuzz: python 3 | Clifford Wolf | |
| 2015-07-30 | Replaced calls to "python" with "python2" | Clifford Wolf | |
| 2015-07-18 | Imported full dev sources | Clifford Wolf | |
 |
index : icestorm | |
| Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered) |
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