From afb459ae2acc6b969dc5fcae3431f59ae134f8fa Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Wed, 11 Dec 2024 13:06:06 +0100 Subject: Fix some of docs table layouts --- docs/source/io_tile.rst | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'docs/source/io_tile.rst') diff --git a/docs/source/io_tile.rst b/docs/source/io_tile.rst index 12d09b6..1ed707b 100644 --- a/docs/source/io_tile.rst +++ b/docs/source/io_tile.rst @@ -327,11 +327,17 @@ configured as follows (bits listed from LSB to MSB): | | | Parameter | +=======================+=======================+=======================+ | 0 3 | PLLCONFIG_5 | Select PLL Type: | +| | +-----------------------+ | | | 000 = DISABLED | +| | +-----------------------+ | | | 010 = SB_PLL40_PAD | +| | +-----------------------+ | | | 100 = SB_PLL40_2_PAD | +| | +-----------------------+ | | | 110 = SB_PLL40_2F_PAD | +| | +-----------------------+ | | | 011 = SB_PLL40_CORE | +| | +-----------------------+ | | | 111 = | | | | SB_PLL40_2F_CORE | +-----------------------+-----------------------+-----------------------+ @@ -340,10 +346,14 @@ configured as follows (bits listed from LSB to MSB): | 0 5 | PLLCONFIG_3 | | +-----------------------+-----------------------+-----------------------+ | 0 5 | PLLCONFIG_5 | FEEDBACK_PATH | +| | +-----------------------+ | | | 000 = "DELAY" | +| | +-----------------------+ | | | 001 = "SIMPLE" | +| | +-----------------------+ | | | 010 = | | | | "PHASE_AND_DELAY" | +| | +-----------------------+ | | | 110 = "EXTERNAL" | +-----------------------+-----------------------+-----------------------+ | 0 2 | PLLCONFIG_9 | | @@ -352,27 +362,39 @@ configured as follows (bits listed from LSB to MSB): +-----------------------+-----------------------+-----------------------+ | 0 4 | PLLCONFIG_4 | DELAY_ADJ | | | | USTMENT_MODE_FEEDBACK | +| | +-----------------------+ | | | 0 = "FIXED" | +| | +-----------------------+ | | | 1 = "DYNAMIC" | +-----------------------+-----------------------+-----------------------+ | 0 4 | PLLCONFIG_9 | DELAY_ADJ | | | | USTMENT_MODE_RELATIVE | +| | +-----------------------+ | | | 0 = "FIXED" | +| | +-----------------------+ | | | 1 = "DYNAMIC" | +-----------------------+-----------------------+-----------------------+ | 0 3 | PLLCONFIG_6 | PLLOUT_SELECT | | | | PLLOUT_SELECT_PORTA | +| | +-----------------------+ | | | 00 = "GENCLK" | +| | +-----------------------+ | | | 01 = "GENCLK_HALF" | +| | +-----------------------+ | | | 10 = "SHIFTREG_90deg" | +| | +-----------------------+ | | | 11 = "SHIFTREG_0deg" | +-----------------------+-----------------------+-----------------------+ | 0 3 | PLLCONFIG_7 | | +-----------------------+-----------------------+-----------------------+ | 0 3 | PLLCONFIG_2 | PLLOUT_SELECT_PORTB | +| | +-----------------------+ | | | 00 = "GENCLK" | +| | +-----------------------+ | | | 01 = "GENCLK_HALF" | +| | +-----------------------+ | | | 10 = "SHIFTREG_90deg" | +| | +-----------------------+ | | | 11 = "SHIFTREG_0deg" | +-----------------------+-----------------------+-----------------------+ | 0 3 | PLLCONFIG_3 | | -- cgit v1.2.3