From 70e01c1802bef592452cada1cba0224185e8029e Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Tue, 18 Jul 2017 18:37:47 +0200 Subject: Add pre- and post-synthesis testbench examples --- examples/icestick/rs232demo.v | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'examples/icestick/rs232demo.v') diff --git a/examples/icestick/rs232demo.v b/examples/icestick/rs232demo.v index f9e7546..40347e8 100644 --- a/examples/icestick/rs232demo.v +++ b/examples/icestick/rs232demo.v @@ -19,6 +19,14 @@ module top ( reg [3:0] bit_cnt = 0; reg recv = 0; + initial begin + LED1 = 0; + LED2 = 0; + LED3 = 0; + LED4 = 0; + LED5 = 0; + end + always @(posedge clk) begin buffer_valid <= 0; if (!recv) begin -- cgit v1.2.3