From 92d3ea0e58f6f3a080d1b44e3d456ffd80590237 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sat, 16 Jan 2016 16:17:56 +0100 Subject: icefuzz improvements, refuzz timings --- icefuzz/cached_ramt.txt | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'icefuzz/cached_ramt.txt') diff --git a/icefuzz/cached_ramt.txt b/icefuzz/cached_ramt.txt index d03bb92..756f468 100644 --- a/icefuzz/cached_ramt.txt +++ b/icefuzz/cached_ramt.txt @@ -3460,17 +3460,21 @@ (7 2) Ram config bit: MEMT_bram_cbit_3 (7 3) Ram config bit: MEMT_bram_cbit_2 (7 4) Cascade buffer Enable bit: MEMT_LC00_inmux00_bram_cbit_5 +(7 4) Cascade buffer Enable bit: MEMT_LC00_inmux02_bram_cbit_5 (7 4) Cascade buffer Enable bit: MEMT_LC01_inmux00_bram_cbit_5 (7 4) Cascade buffer Enable bit: MEMT_LC01_inmux02_bram_cbit_5 (7 4) Cascade buffer Enable bit: MEMT_LC02_inmux00_bram_cbit_5 +(7 4) Cascade buffer Enable bit: MEMT_LC03_inmux00_bram_cbit_5 (7 4) Cascade buffer Enable bit: MEMT_LC04_inmux00_bram_cbit_5 (7 4) Cascade buffer Enable bit: MEMT_LC05_inmux00_bram_cbit_5 (7 4) Cascade buffer Enable bit: MEMT_LC06_inmux00_bram_cbit_5 (7 4) Cascade buffer Enable bit: MEMT_LC07_inmux00_bram_cbit_5 (7 5) Cascade bit: MEMT_LC00_inmux00_bram_cbit_4 +(7 5) Cascade bit: MEMT_LC00_inmux02_bram_cbit_4 (7 5) Cascade bit: MEMT_LC01_inmux00_bram_cbit_4 (7 5) Cascade bit: MEMT_LC01_inmux02_bram_cbit_4 (7 5) Cascade bit: MEMT_LC02_inmux00_bram_cbit_4 +(7 5) Cascade bit: MEMT_LC03_inmux00_bram_cbit_4 (7 5) Cascade bit: MEMT_LC04_inmux00_bram_cbit_4 (7 5) Cascade bit: MEMT_LC05_inmux00_bram_cbit_4 (7 5) Cascade bit: MEMT_LC06_inmux00_bram_cbit_4 -- cgit v1.2.3