From 2fe704227f4f5caa95aa0c79aee21c847d0236f0 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sat, 9 Jan 2016 12:45:43 +0100 Subject: Fuzzed RamCascade bits --- icefuzz/cached_ramt_8k.txt | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) (limited to 'icefuzz/cached_ramt_8k.txt') diff --git a/icefuzz/cached_ramt_8k.txt b/icefuzz/cached_ramt_8k.txt index 6a7c7a1..aaa3a3e 100644 --- a/icefuzz/cached_ramt_8k.txt +++ b/icefuzz/cached_ramt_8k.txt @@ -3465,6 +3465,42 @@ (7 15) Column buffer control bit: MEMT_colbuf_cntl_6 (7 2) Ram config bit: MEMT_bram_cbit_3 (7 3) Ram config bit: MEMT_bram_cbit_2 +(7 4) Cascade buffer Enable bit: MEMT_LC00_inmux00_bram_cbit_5 +(7 4) Cascade buffer Enable bit: MEMT_LC01_inmux00_bram_cbit_5 +(7 4) Cascade buffer Enable bit: MEMT_LC02_inmux00_bram_cbit_5 +(7 4) Cascade buffer Enable bit: MEMT_LC03_inmux00_bram_cbit_5 +(7 4) Cascade buffer Enable bit: MEMT_LC06_inmux00_bram_cbit_5 +(7 4) Cascade buffer Enable bit: MEMT_LC06_inmux02_bram_cbit_5 +(7 4) Cascade buffer Enable bit: MEMT_LC07_inmux00_bram_cbit_5 +(7 4) Cascade buffer Enable bit: MEMT_LC07_inmux02_bram_cbit_5 +(7 5) Cascade bit: MEMT_LC00_inmux00_bram_cbit_4 +(7 5) Cascade bit: MEMT_LC01_inmux00_bram_cbit_4 +(7 5) Cascade bit: MEMT_LC02_inmux00_bram_cbit_4 +(7 5) Cascade bit: MEMT_LC03_inmux00_bram_cbit_4 +(7 5) Cascade bit: MEMT_LC06_inmux00_bram_cbit_4 +(7 5) Cascade bit: MEMT_LC06_inmux02_bram_cbit_4 +(7 5) Cascade bit: MEMT_LC07_inmux00_bram_cbit_4 +(7 5) Cascade bit: MEMT_LC07_inmux02_bram_cbit_4 +(7 6) Cascade buffer Enable bit: MEMT_LC00_inmux00_bram_cbit_7 +(7 6) Cascade buffer Enable bit: MEMT_LC01_inmux00_bram_cbit_7 +(7 6) Cascade buffer Enable bit: MEMT_LC02_inmux00_bram_cbit_7 +(7 6) Cascade buffer Enable bit: MEMT_LC03_inmux00_bram_cbit_7 +(7 6) Cascade buffer Enable bit: MEMT_LC04_inmux00_bram_cbit_7 +(7 6) Cascade buffer Enable bit: MEMT_LC05_inmux00_bram_cbit_7 +(7 6) Cascade buffer Enable bit: MEMT_LC06_inmux00_bram_cbit_7 +(7 6) Cascade buffer Enable bit: MEMT_LC06_inmux02_bram_cbit_7 +(7 6) Cascade buffer Enable bit: MEMT_LC07_inmux00_bram_cbit_7 +(7 6) Cascade buffer Enable bit: MEMT_LC07_inmux02_bram_cbit_7 +(7 7) Cascade bit: MEMT_LC00_inmux00_bram_cbit_6 +(7 7) Cascade bit: MEMT_LC01_inmux00_bram_cbit_6 +(7 7) Cascade bit: MEMT_LC02_inmux00_bram_cbit_6 +(7 7) Cascade bit: MEMT_LC03_inmux00_bram_cbit_6 +(7 7) Cascade bit: MEMT_LC04_inmux00_bram_cbit_6 +(7 7) Cascade bit: MEMT_LC05_inmux00_bram_cbit_6 +(7 7) Cascade bit: MEMT_LC06_inmux00_bram_cbit_6 +(7 7) Cascade bit: MEMT_LC06_inmux02_bram_cbit_6 +(7 7) Cascade bit: MEMT_LC07_inmux00_bram_cbit_6 +(7 7) Cascade bit: MEMT_LC07_inmux02_bram_cbit_6 (7 8) Column buffer control bit: MEMT_colbuf_cntl_1 (7 9) Column buffer control bit: MEMT_colbuf_cntl_0 (8 0) routing sp4_h_l_36 sp4_h_r_1 -- cgit v1.2.3