From ed8c4e8c034ffca4424f92fa683ff631c4205b50 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Tue, 20 Jun 2017 16:50:52 -0700 Subject: initial packing and unpacking parameters --- icepack/icepack.cc | 65 +++++++++++++++++++++++++++++++++++++++++------------- 1 file changed, 50 insertions(+), 15 deletions(-) (limited to 'icepack/icepack.cc') diff --git a/icepack/icepack.cc b/icepack/icepack.cc index 3230d06..9a3c667 100644 --- a/icepack/icepack.cc +++ b/icepack/icepack.cc @@ -170,7 +170,7 @@ struct BramIndexConverter int bank_off; BramIndexConverter(const FpgaConfig *fpga, int tile_x, int tile_y); - void get_bram_index(int bit_x, int bit_y, int &bram_bank, int &bram_x, int &bram_y) const; + void get_bram_index(uint bit_x, uint bit_y, uint &bram_bank, uint &bram_x, uint &bram_y) const; }; static void update_crc16(uint16_t &crc, uint8_t byte) @@ -249,7 +249,7 @@ void FpgaConfig::read_bits(std::istream &ifs) { // one command byte. the lower 4 bits of the command byte specify // the length of the command payload. - + uint8_t command = read_byte(ifs, crc_value, file_offset); uint32_t payload = 0; @@ -396,9 +396,11 @@ void FpgaConfig::read_bits(std::istream &ifs) this->device = "1k"; else if (this->cram_width == 872 && this->cram_height == 272) this->device = "8k"; + else if (this->cram_width == 692 && this->cram_height == 336) + this->device = "5k"; else error("Failed to detect chip type.\n"); - + info("Chip type is '%s'.\n", this->device.c_str()); } @@ -620,6 +622,12 @@ void FpgaConfig::read_ascii(std::istream &ifs) this->cram_height = 272; this->bram_width = 128; this->bram_height = 2 * 128; + } else + if (this->device == "5k") { + this->cram_width = 692; + this->cram_height = 336; + this->bram_width = 160; + this->bram_height = 2 * 128; } else error("Unsupported chip type '%s'.\n", this->device.c_str()); @@ -704,7 +712,7 @@ void FpgaConfig::read_ascii(std::istream &ifs) for (int i = 0; i < 4; i++) if ((value & (1 << i)) != 0) { - int bram_bank, bram_x, bram_y; + uint bram_bank, bram_x, bram_y; bic.get_bram_index(bit_x+i, bit_y, bram_bank, bram_x, bram_y); this->bram[bram_bank][bram_x][bram_y] = true; } @@ -725,10 +733,10 @@ void FpgaConfig::read_ascii(std::istream &ifs) continue; } - + if (command == ".sym") continue; - + if (command.substr(0, 1) == ".") error("Unknown statement: %s\n", command.c_str()); error("Unexpected data line: %s\n", line.c_str()); @@ -785,12 +793,20 @@ void FpgaConfig::write_ascii(std::ostream &ofs) const BramIndexConverter bic(this, x, y); ofs << stringf(".ram_data %d %d\n", x, y); - for (int bit_y = 0; bit_y < 16; bit_y++) { - for (int bit_x = 256-4; bit_x >= 0; bit_x -= 4) { + for (uint bit_y = 0; bit_y < 16; bit_y++) { + for (uint bit_x = 256-4; bit_x > 0; bit_x -= 4) { int value = 0; for (int i = 0; i < 4; i++) { - int bram_bank, bram_x, bram_y; + uint bram_bank, bram_x, bram_y; bic.get_bram_index(bit_x+i, bit_y, bram_bank, bram_x, bram_y); + if (bram_x >= this->bram[bram_bank].size()) { + error("bram_x %u higher than loaded bram size %lu\n", bram_x, this->bram[bram_bank].size()); + break; + } + if (bram_y >= this->bram[bram_bank][bram_x].size()) { + error("bram_y %u higher than loaded bram size %lu\n", bram_y, this->bram[bram_bank][bram_x].size()); + break; + } if (this->bram[bram_bank][bram_x][bram_y]) value += 1 << i; } @@ -870,6 +886,7 @@ int FpgaConfig::chip_width() const { if (this->device == "384") return 6; if (this->device == "1k") return 12; + if (this->device == "5k") return 24; if (this->device == "8k") return 32; panic("Unknown chip type '%s'.\n", this->device.c_str()); } @@ -878,6 +895,7 @@ int FpgaConfig::chip_height() const { if (this->device == "384") return 8; if (this->device == "1k") return 16; + if (this->device == "5k") return 30; if (this->device == "8k") return 32; panic("Unknown chip type '%s'.\n", this->device.c_str()); } @@ -886,6 +904,8 @@ vector FpgaConfig::chip_cols() const { if (this->device == "384") return vector({18, 54, 54, 54, 54}); if (this->device == "1k") return vector({18, 54, 54, 42, 54, 54, 54}); + // Its IPConnect or Mutiplier block, five logic, ram, six logic. + if (this->device == "5k") return vector({18, 54, 54, 54, 54, 54, 42, 54, 54, 54, 54, 54, 54}); if (this->device == "8k") return vector({18, 54, 54, 54, 54, 54, 54, 54, 42, 54, 54, 54, 54, 54, 54, 54, 54}); panic("Unknown chip type '%s'.\n", this->device.c_str()); } @@ -902,6 +922,11 @@ string FpgaConfig::tile_type(int x, int y) const return "logic"; } + if (this->device == "5k") { + if (x == 6 || x == 18) return y % 2 == 1 ? "ramb" : "ramt"; + return "logic"; + } + if (this->device == "8k") { if (x == 8 || x == 25) return y % 2 == 1 ? "ramb" : "ramt"; return "logic"; @@ -951,7 +976,7 @@ void FpgaConfig::cram_checkerboard(int m) { if ((x+y) % 2 == m) continue; - + CramIndexConverter cic(this, x, y); for (int bit_y = 0; bit_y < 16; bit_y++) @@ -1031,7 +1056,7 @@ void CramIndexConverter::get_cram_index(int bit_x, int bit_y, int &cram_bank, in cram_x = bank_xoff + column_width - 1 - bit_x; else cram_x = bank_xoff + bit_x; - + if (top_half) cram_y = bank_yoff + (15 - bit_y); else @@ -1050,15 +1075,26 @@ BramIndexConverter::BramIndexConverter(const FpgaConfig *fpga, int tile_x, int t bool right_half = this->tile_x > chip_width / 2; bool top_half = this->tile_y > chip_height / 2; + // The UltraPlus 5k line is special because the bottom quarter of the chip is + // used for SRAM instead of logic. Therefore the bitstream for the bottom two + // quadrants are half the height of the top. + if (this->fpga->device == "5k") { + top_half = this->tile_y > chip_height / 3; + } this->bank_num = 0; - if (top_half) this->bank_num |= 1; + int y_offset = this->tile_y - 1; + if (!top_half) { + this->bank_num |= 1; + } else { + y_offset = this->tile_y - chip_height / 3; + } if (right_half) this->bank_num |= 2; - this->bank_off = 16 * ((top_half ? this->tile_y - chip_height / 2 : this->tile_y - 1) / 2); + this->bank_off = 16 * (y_offset / 2); } -void BramIndexConverter::get_bram_index(int bit_x, int bit_y, int &bram_bank, int &bram_x, int &bram_y) const +void BramIndexConverter::get_bram_index(uint bit_x, uint bit_y, uint &bram_bank, uint &bram_x, uint &bram_y) const { int index = 256 * bit_y + (16*(bit_x/16) + 15 - bit_x%16); bram_bank = bank_num; @@ -1205,4 +1241,3 @@ int main(int argc, char **argv) info("Done.\n"); return 0; } - -- cgit v1.2.3 From 58a6110be198089d784b5ad3e2ecb611182bd5ea Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Thu, 22 Jun 2017 17:38:38 -0700 Subject: Add icefuzz support for the UP5K and rework underlying device specification for more flexibility. --- icepack/icepack.cc | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'icepack/icepack.cc') diff --git a/icepack/icepack.cc b/icepack/icepack.cc index 9a3c667..90c5eb1 100644 --- a/icepack/icepack.cc +++ b/icepack/icepack.cc @@ -170,7 +170,7 @@ struct BramIndexConverter int bank_off; BramIndexConverter(const FpgaConfig *fpga, int tile_x, int tile_y); - void get_bram_index(uint bit_x, uint bit_y, uint &bram_bank, uint &bram_x, uint &bram_y) const; + void get_bram_index(int bit_x, int bit_y, int &bram_bank, int &bram_x, int &bram_y) const; }; static void update_crc16(uint16_t &crc, uint8_t byte) @@ -712,7 +712,7 @@ void FpgaConfig::read_ascii(std::istream &ifs) for (int i = 0; i < 4; i++) if ((value & (1 << i)) != 0) { - uint bram_bank, bram_x, bram_y; + int bram_bank, bram_x, bram_y; bic.get_bram_index(bit_x+i, bit_y, bram_bank, bram_x, bram_y); this->bram[bram_bank][bram_x][bram_y] = true; } @@ -793,17 +793,17 @@ void FpgaConfig::write_ascii(std::ostream &ofs) const BramIndexConverter bic(this, x, y); ofs << stringf(".ram_data %d %d\n", x, y); - for (uint bit_y = 0; bit_y < 16; bit_y++) { - for (uint bit_x = 256-4; bit_x > 0; bit_x -= 4) { + for (int bit_y = 0; bit_y < 16; bit_y++) { + for (int bit_x = 256-4; bit_x >= 0; bit_x -= 4) { int value = 0; for (int i = 0; i < 4; i++) { - uint bram_bank, bram_x, bram_y; + int bram_bank, bram_x, bram_y; bic.get_bram_index(bit_x+i, bit_y, bram_bank, bram_x, bram_y); - if (bram_x >= this->bram[bram_bank].size()) { + if (bram_x >= int(this->bram[bram_bank].size())) { error("bram_x %u higher than loaded bram size %lu\n", bram_x, this->bram[bram_bank].size()); break; } - if (bram_y >= this->bram[bram_bank][bram_x].size()) { + if (bram_y >= int(this->bram[bram_bank][bram_x].size())) { error("bram_y %u higher than loaded bram size %lu\n", bram_y, this->bram[bram_bank][bram_x].size()); break; } @@ -1094,7 +1094,7 @@ BramIndexConverter::BramIndexConverter(const FpgaConfig *fpga, int tile_x, int t this->bank_off = 16 * (y_offset / 2); } -void BramIndexConverter::get_bram_index(uint bit_x, uint bit_y, uint &bram_bank, uint &bram_x, uint &bram_y) const +void BramIndexConverter::get_bram_index(int bit_x, int bit_y, int &bram_bank, int &bram_x, int &bram_y) const { int index = 256 * bit_y + (16*(bit_x/16) + 15 - bit_x%16); bram_bank = bank_num; -- cgit v1.2.3 From a25c8679ac37df5219e1d7a8cdd932288cd596b1 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Fri, 23 Jun 2017 22:53:54 -0700 Subject: More work figuring out values in icebox.py --- icepack/icepack.cc | 30 +++++++++++++++++++++++------- 1 file changed, 23 insertions(+), 7 deletions(-) (limited to 'icepack/icepack.cc') diff --git a/icepack/icepack.cc b/icepack/icepack.cc index 90c5eb1..327a092 100644 --- a/icepack/icepack.cc +++ b/icepack/icepack.cc @@ -415,10 +415,11 @@ void FpgaConfig::write_bits(std::ostream &ofs) const for (auto byte : this->initblop) ofs << byte; - debug("Writing preamble.\n"); + info("Writing preamble.\n"); write_byte(ofs, crc_value, file_offset, 0x7E); write_byte(ofs, crc_value, file_offset, 0xAA); write_byte(ofs, crc_value, file_offset, 0x99); + info("blah"); write_byte(ofs, crc_value, file_offset, 0x7E); debug("Setting freqrange to '%s'.\n", this->freqrange.c_str()); @@ -773,7 +774,7 @@ void FpgaConfig::write_ascii(std::ostream &ofs) const { CramIndexConverter cic(this, x, y); - if (cic.tile_type == "corner") + if (cic.tile_type == "corner" || cic.tile_type == "unsupported") continue; ofs << stringf(".%s_tile %d %d\n", cic.tile_type.c_str(), x, y); @@ -783,6 +784,12 @@ void FpgaConfig::write_ascii(std::ostream &ofs) const int cram_bank, cram_x, cram_y; cic.get_cram_index(bit_x, bit_y, cram_bank, cram_x, cram_y); tile_bits.insert(tile_bit_t(cram_bank, cram_x, cram_y)); + if (cram_x > int(this->cram[cram_bank].size())) { + error("cram_x %d (bit %d, %d) larger than bank size %lu\n", cram_x, bit_x, bit_y, this->cram[cram_bank].size()); + } + if (cram_y > int(this->cram[cram_bank][cram_x].size())) { + error("cram_y %d larger than bank size %lu\n", cram_y, this->cram[cram_bank][cram_x].size()); + } ofs << (this->cram[cram_bank][cram_x][cram_y] ? '1' : '0'); } ofs << '\n'; @@ -800,11 +807,11 @@ void FpgaConfig::write_ascii(std::ostream &ofs) const int bram_bank, bram_x, bram_y; bic.get_bram_index(bit_x+i, bit_y, bram_bank, bram_x, bram_y); if (bram_x >= int(this->bram[bram_bank].size())) { - error("bram_x %u higher than loaded bram size %lu\n", bram_x, this->bram[bram_bank].size()); + error("%d %d bram_x %d higher than loaded bram size %lu\n",bit_x+i, bit_y, bram_x, this->bram[bram_bank].size()); break; } if (bram_y >= int(this->bram[bram_bank][bram_x].size())) { - error("bram_y %u higher than loaded bram size %lu\n", bram_y, this->bram[bram_bank][bram_x].size()); + error("bram_y %d higher than loaded bram size %lu\n", bram_y, this->bram[bram_bank][bram_x].size()); break; } if (this->bram[bram_bank][bram_x][bram_y]) @@ -905,7 +912,7 @@ vector FpgaConfig::chip_cols() const if (this->device == "384") return vector({18, 54, 54, 54, 54}); if (this->device == "1k") return vector({18, 54, 54, 42, 54, 54, 54}); // Its IPConnect or Mutiplier block, five logic, ram, six logic. - if (this->device == "5k") return vector({18, 54, 54, 54, 54, 54, 42, 54, 54, 54, 54, 54, 54}); + if (this->device == "5k") return vector({54, 54, 54, 54, 54, 54, 42, 54, 54, 54, 54, 54, 54}); if (this->device == "8k") return vector({18, 54, 54, 54, 54, 54, 54, 54, 42, 54, 54, 54, 54, 54, 54, 54, 54}); panic("Unknown chip type '%s'.\n", this->device.c_str()); } @@ -913,6 +920,8 @@ vector FpgaConfig::chip_cols() const string FpgaConfig::tile_type(int x, int y) const { if ((x == 0 || x == this->chip_width()+1) && (y == 0 || y == this->chip_height()+1)) return "corner"; + // The sides on the 5k devices are unsupported tile types. + if (this->device == "5k" && (x == 0 || x == this->chip_width()+1)) return "unsupported"; if ((x == 0 || x == this->chip_width()+1) || (y == 0 || y == this->chip_height()+1)) return "io"; if (this->device == "384") return "logic"; @@ -942,6 +951,7 @@ int FpgaConfig::tile_width(const string &type) const if (type == "ramb") return 42; if (type == "ramt") return 42; if (type == "io") return 18; + if (type == "unsupported") return 76; panic("Unknown tile type '%s'.\n", type.c_str()); } @@ -1004,7 +1014,11 @@ CramIndexConverter::CramIndexConverter(const FpgaConfig *fpga, int tile_x, int t this->left_right_io = this->tile_x == 0 || this->tile_x == chip_width+1; this->right_half = this->tile_x > chip_width / 2; - this->top_half = this->tile_y > chip_height / 2; + if (this->fpga->device == "5k") { + this->top_half = this->tile_y > chip_height / 3; + } else { + this->top_half = this->tile_y > chip_height / 2; + } this->bank_num = 0; if (this->top_half) this->bank_num |= 1; @@ -1086,8 +1100,10 @@ BramIndexConverter::BramIndexConverter(const FpgaConfig *fpga, int tile_x, int t int y_offset = this->tile_y - 1; if (!top_half) { this->bank_num |= 1; - } else { + } else if (this->fpga->device == "5k") { y_offset = this->tile_y - chip_height / 3; + } else { + y_offset = this->tile_y - chip_height / 2; } if (right_half) this->bank_num |= 2; -- cgit v1.2.3 From 15bcbb7c333ee184d87427e9fe734fd8ee6d5bd2 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Sun, 2 Jul 2017 15:39:14 -0700 Subject: Correct cram mapping so glbcheck actually passes. --- icepack/icepack.cc | 74 ++++++++++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 63 insertions(+), 11 deletions(-) (limited to 'icepack/icepack.cc') diff --git a/icepack/icepack.cc b/icepack/icepack.cc index 327a092..ff12267 100644 --- a/icepack/icepack.cc +++ b/icepack/icepack.cc @@ -848,8 +848,48 @@ void FpgaConfig::write_cram_pbm(std::ostream &ofs, int bank_num) const debug("## %s\n", __PRETTY_FUNCTION__); info("Writing cram pbm file..\n"); - ofs << "P1\n"; + ofs << "P3\n"; ofs << stringf("%d %d\n", 2*this->cram_width, 2*this->cram_height); + ofs << "255\n"; + uint32_t tile_type[4][this->cram_width][this->cram_height]; + for (int y = 0; y <= this->chip_height()+1; y++) + for (int x = 0; x <= this->chip_width()+1; x++) + { + CramIndexConverter cic(this, x, y); + + uint32_t color = 0x000000; + if (cic.tile_type == "io") { + color = 0x00aa00; + } else if (cic.tile_type == "logic") { + if ((x + y) %2 == 0) { + color = 0x0000ff; + } else { + color = 0x0000aa; + } + if (x == 12 && y == 25) { + color = 0xaa00aa; + } + if (x == 12 && y == 24) { + color = 0x888888; + } + } else if (cic.tile_type == "ramt") { + color = 0xff0000; + } else if (cic.tile_type == "ramb") { + color = 0xaa0000; + } else if (cic.tile_type == "unsupported") { + color = 0x333333; + } else { + info("%s\n", cic.tile_type.c_str()); + } + + for (int bit_y = 0; bit_y < 16; bit_y++) + for (int bit_x = 0; bit_x < cic.tile_width; bit_x++) { + int cram_bank, cram_x, cram_y; + cic.get_cram_index(bit_x, bit_y, cram_bank, cram_x, cram_y); + + tile_type[cram_bank][cram_x][cram_y] = color; + } + } for (int y = 2*this->cram_height-1; y >= 0; y--) { for (int x = 0; x < 2*this->cram_width; x++) { int bank = 0, bank_x = x, bank_y = y; @@ -858,9 +898,16 @@ void FpgaConfig::write_cram_pbm(std::ostream &ofs, int bank_num) const if (bank_y >= this->cram_height) bank |= 2, bank_y = 2*this->cram_height - bank_y - 1; if (bank_num >= 0 && bank != bank_num) - ofs << " 0"; - else - ofs << (this->cram[bank][bank_x][bank_y] ? " 1" : " 0"); + ofs << " 255 255 255"; + else if (this->cram[bank][bank_x][bank_y]) { + ofs << " 255 255 255"; + } else { + uint32_t color = tile_type[bank][bank_x][bank_y]; + uint8_t r = color >> 16; + uint8_t g = color >> 8; + uint8_t b = color & 0xff; + ofs << stringf(" %d %d %d", r, g, b); + } } ofs << '\n'; } @@ -880,6 +927,7 @@ void FpgaConfig::write_bram_pbm(std::ostream &ofs, int bank_num) const bank |= 1, bank_x = 2*this->bram_width - bank_x - 1; if (bank_y >= this->bram_height) bank |= 2, bank_y = 2*this->bram_height - bank_y - 1; + info("%d %d %d\n", bank, bank_x, bank_y); if (bank_num >= 0 && bank != bank_num) ofs << " 0"; else @@ -932,7 +980,7 @@ string FpgaConfig::tile_type(int x, int y) const } if (this->device == "5k") { - if (x == 6 || x == 18) return y % 2 == 1 ? "ramb" : "ramt"; + if (x == 6 || x == 19) return y % 2 == 1 ? "ramb" : "ramt"; return "logic"; } @@ -1015,7 +1063,7 @@ CramIndexConverter::CramIndexConverter(const FpgaConfig *fpga, int tile_x, int t this->left_right_io = this->tile_x == 0 || this->tile_x == chip_width+1; this->right_half = this->tile_x > chip_width / 2; if (this->fpga->device == "5k") { - this->top_half = this->tile_y > chip_height / 3; + this->top_half = this->tile_y > (chip_height * 2 / 3); } else { this->top_half = this->tile_y > chip_height / 2; } @@ -1089,11 +1137,11 @@ BramIndexConverter::BramIndexConverter(const FpgaConfig *fpga, int tile_x, int t bool right_half = this->tile_x > chip_width / 2; bool top_half = this->tile_y > chip_height / 2; - // The UltraPlus 5k line is special because the bottom quarter of the chip is - // used for SRAM instead of logic. Therefore the bitstream for the bottom two - // quadrants are half the height of the top. + // The UltraPlus 5k line is special because the top quarter of the chip is + // used for SRAM instead of logic. Therefore the bitstream for the top two + // quadrants are half the height of the bottom. if (this->fpga->device == "5k") { - top_half = this->tile_y > chip_height / 3; + top_half = this->tile_y > (chip_height / 3); } this->bank_num = 0; @@ -1101,7 +1149,7 @@ BramIndexConverter::BramIndexConverter(const FpgaConfig *fpga, int tile_x, int t if (!top_half) { this->bank_num |= 1; } else if (this->fpga->device == "5k") { - y_offset = this->tile_y - chip_height / 3; + y_offset = this->tile_y - (chip_height / 3); } else { y_offset = this->tile_y - chip_height / 2; } @@ -1243,9 +1291,13 @@ int main(int argc, char **argv) fpga_config.cram_clear(); fpga_config.cram_checkerboard(checkerboard_m); } + + info("netpbm\n"); if (netpbm_fill_tiles) fpga_config.cram_fill_tiles(); + + info("fill done\n"); if (netpbm_mode) { if (netpbm_bram) -- cgit v1.2.3 From 96511b32b1ee0dbae91f9878094c8f12f5bdafaa Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Tue, 4 Jul 2017 12:24:28 +0200 Subject: Indenting fixes in icepack.cc --- icepack/icepack.cc | 88 ++++++++++++++++++++++++++---------------------------- 1 file changed, 43 insertions(+), 45 deletions(-) (limited to 'icepack/icepack.cc') diff --git a/icepack/icepack.cc b/icepack/icepack.cc index ff12267..fd2ce5b 100644 --- a/icepack/icepack.cc +++ b/icepack/icepack.cc @@ -419,7 +419,6 @@ void FpgaConfig::write_bits(std::ostream &ofs) const write_byte(ofs, crc_value, file_offset, 0x7E); write_byte(ofs, crc_value, file_offset, 0xAA); write_byte(ofs, crc_value, file_offset, 0x99); - info("blah"); write_byte(ofs, crc_value, file_offset, 0x7E); debug("Setting freqrange to '%s'.\n", this->freqrange.c_str()); @@ -851,42 +850,41 @@ void FpgaConfig::write_cram_pbm(std::ostream &ofs, int bank_num) const ofs << "P3\n"; ofs << stringf("%d %d\n", 2*this->cram_width, 2*this->cram_height); ofs << "255\n"; - uint32_t tile_type[4][this->cram_width][this->cram_height]; + uint32_t tile_type[4][this->cram_width][this->cram_height]; for (int y = 0; y <= this->chip_height()+1; y++) for (int x = 0; x <= this->chip_width()+1; x++) { CramIndexConverter cic(this, x, y); - - uint32_t color = 0x000000; - if (cic.tile_type == "io") { - color = 0x00aa00; - } else if (cic.tile_type == "logic") { - if ((x + y) %2 == 0) { - color = 0x0000ff; - } else { - color = 0x0000aa; - } - if (x == 12 && y == 25) { - color = 0xaa00aa; - } - if (x == 12 && y == 24) { - color = 0x888888; - } - } else if (cic.tile_type == "ramt") { - color = 0xff0000; - } else if (cic.tile_type == "ramb") { - color = 0xaa0000; - } else if (cic.tile_type == "unsupported") { - color = 0x333333; - } else { - info("%s\n", cic.tile_type.c_str()); - } + + uint32_t color = 0x000000; + if (cic.tile_type == "io") { + color = 0x00aa00; + } else if (cic.tile_type == "logic") { + if ((x + y) % 2 == 0) { + color = 0x0000ff; + } else { + color = 0x0000aa; + } + if (x == 12 && y == 25) { + color = 0xaa00aa; + } + if (x == 12 && y == 24) { + color = 0x888888; + } + } else if (cic.tile_type == "ramt") { + color = 0xff0000; + } else if (cic.tile_type == "ramb") { + color = 0xaa0000; + } else if (cic.tile_type == "unsupported") { + color = 0x333333; + } else { + info("%s\n", cic.tile_type.c_str()); + } for (int bit_y = 0; bit_y < 16; bit_y++) for (int bit_x = 0; bit_x < cic.tile_width; bit_x++) { int cram_bank, cram_x, cram_y; cic.get_cram_index(bit_x, bit_y, cram_bank, cram_x, cram_y); - tile_type[cram_bank][cram_x][cram_y] = color; } } @@ -900,14 +898,14 @@ void FpgaConfig::write_cram_pbm(std::ostream &ofs, int bank_num) const if (bank_num >= 0 && bank != bank_num) ofs << " 255 255 255"; else if (this->cram[bank][bank_x][bank_y]) { - ofs << " 255 255 255"; - } else { - uint32_t color = tile_type[bank][bank_x][bank_y]; - uint8_t r = color >> 16; - uint8_t g = color >> 8; - uint8_t b = color & 0xff; + ofs << " 255 255 255"; + } else { + uint32_t color = tile_type[bank][bank_x][bank_y]; + uint8_t r = color >> 16; + uint8_t g = color >> 8; + uint8_t b = color & 0xff; ofs << stringf(" %d %d %d", r, g, b); - } + } } ofs << '\n'; } @@ -927,7 +925,7 @@ void FpgaConfig::write_bram_pbm(std::ostream &ofs, int bank_num) const bank |= 1, bank_x = 2*this->bram_width - bank_x - 1; if (bank_y >= this->bram_height) bank |= 2, bank_y = 2*this->bram_height - bank_y - 1; - info("%d %d %d\n", bank, bank_x, bank_y); + info("%d %d %d\n", bank, bank_x, bank_y); if (bank_num >= 0 && bank != bank_num) ofs << " 0"; else @@ -994,12 +992,12 @@ string FpgaConfig::tile_type(int x, int y) const int FpgaConfig::tile_width(const string &type) const { - if (type == "corner") return 0; - if (type == "logic") return 54; - if (type == "ramb") return 42; - if (type == "ramt") return 42; - if (type == "io") return 18; - if (type == "unsupported") return 76; + if (type == "corner") return 0; + if (type == "logic") return 54; + if (type == "ramb") return 42; + if (type == "ramt") return 42; + if (type == "io") return 18; + if (type == "unsupported") return 76; panic("Unknown tile type '%s'.\n", type.c_str()); } @@ -1291,13 +1289,13 @@ int main(int argc, char **argv) fpga_config.cram_clear(); fpga_config.cram_checkerboard(checkerboard_m); } - + info("netpbm\n"); if (netpbm_fill_tiles) fpga_config.cram_fill_tiles(); - - info("fill done\n"); + + info("fill done\n"); if (netpbm_mode) { if (netpbm_bram) -- cgit v1.2.3