#![allow(non_camel_case_types)] #[derive(Copy, Clone, Debug, PartialEq, Eq)] pub enum Interrupt { #[doc = "0 - TMR1"] TMR1 = 0, #[doc = "4 - TMR5"] TMR5 = 4, #[doc = "5 - TMR6"] TMR6 = 5, #[doc = "6 - TMR7"] TMR7 = 6, #[doc = "7 - TMR8"] TMR8 = 7, #[doc = "8 - CAN1"] CAN1 = 8, #[doc = "9 - CAN1_ERROR"] CAN1_ERROR = 9, #[doc = "10 - GPIO1_0"] GPIO1_0 = 10, #[doc = "11 - GPIO1_1"] GPIO1_1 = 11, #[doc = "12 - I3C1"] I3C1 = 12, #[doc = "13 - LPI2C1"] LPI2C1 = 13, #[doc = "14 - LPI2C2"] LPI2C2 = 14, #[doc = "15 - LPIT1"] LPIT1 = 15, #[doc = "16 - LPSPI1"] LPSPI1 = 16, #[doc = "17 - LPSPI2"] LPSPI2 = 17, #[doc = "18 - LPTMR1"] LPTMR1 = 18, #[doc = "19 - LPUART1"] LPUART1 = 19, #[doc = "20 - LPUART2"] LPUART2 = 20, #[doc = "21 - MU1"] MU1 = 21, #[doc = "22 - MU2"] MU2 = 22, #[doc = "23 - PWM1_FAULT"] PWM1_FAULT = 23, #[doc = "24 - PWM1_0"] PWM1_0 = 24, #[doc = "25 - PWM1_1"] PWM1_1 = 25, #[doc = "26 - PWM1_2"] PWM1_2 = 26, #[doc = "27 - PWM1_3"] PWM1_3 = 27, #[doc = "36 - TPM1"] TPM1 = 36, #[doc = "37 - TPM2"] TPM2 = 37, #[doc = "38 - RTWDOG1"] RTWDOG1 = 38, #[doc = "39 - RTWDOG2"] RTWDOG2 = 39, #[doc = "40 - TRDC_MGR_AON"] TRDC_MGR_AON = 40, #[doc = "41 - PDM_HWVAD_EVENT"] PDM_HWVAD_EVENT = 41, #[doc = "42 - PDM_HWVAD_ERROR"] PDM_HWVAD_ERROR = 42, #[doc = "43 - PDM_EVENT"] PDM_EVENT = 43, #[doc = "44 - PDM_ERROR"] PDM_ERROR = 44, #[doc = "45 - SAI1"] SAI1 = 45, #[doc = "51 - CAN2"] CAN2 = 51, #[doc = "52 - CAN2_ERROR"] CAN2_ERROR = 52, #[doc = "53 - FLEXIO1"] FLEXIO1 = 53, #[doc = "54 - FLEXIO2"] FLEXIO2 = 54, #[doc = "55 - FLEXSPI1"] FLEXSPI1 = 55, #[doc = "56 - FLEXSPI2"] FLEXSPI2 = 56, #[doc = "57 - GPIO2_0"] GPIO2_0 = 57, #[doc = "58 - GPIO2_1"] GPIO2_1 = 58, #[doc = "59 - GPIO3_0"] GPIO3_0 = 59, #[doc = "60 - GPIO3_1"] GPIO3_1 = 60, #[doc = "61 - I3C2"] I3C2 = 61, #[doc = "62 - LPI2C3"] LPI2C3 = 62, #[doc = "63 - LPI2C4"] LPI2C4 = 63, #[doc = "64 - LPIT2"] LPIT2 = 64, #[doc = "65 - LPSPI3"] LPSPI3 = 65, #[doc = "66 - LPSPI4"] LPSPI4 = 66, #[doc = "67 - LPTMR2"] LPTMR2 = 67, #[doc = "68 - LPUART3"] LPUART3 = 68, #[doc = "69 - LPUART4"] LPUART4 = 69, #[doc = "70 - LPUART5"] LPUART5 = 70, #[doc = "71 - LPUART6"] LPUART6 = 71, #[doc = "73 - BBNSM"] BBNSM = 73, #[doc = "75 - TPM3"] TPM3 = 75, #[doc = "76 - TPM4"] TPM4 = 76, #[doc = "77 - TPM5"] TPM5 = 77, #[doc = "78 - TPM6"] TPM6 = 78, #[doc = "79 - RTWDOG3"] RTWDOG3 = 79, #[doc = "80 - RTWDOG4"] RTWDOG4 = 80, #[doc = "81 - RTWDOG5"] RTWDOG5 = 81, #[doc = "82 - TRDC_MGR_WKUP"] TRDC_MGR_WKUP = 82, #[doc = "86 - USDHC1"] USDHC1 = 86, #[doc = "87 - USDHC2"] USDHC2 = 87, #[doc = "88 - TRDC_MGR_MEGA"] TRDC_MGR_MEGA = 88, #[doc = "93 - ADC1"] ADC1 = 93, #[doc = "94 - DMA_ERROR"] DMA_ERROR = 94, #[doc = "95 - DMA3_CH0"] DMA3_CH0 = 95, #[doc = "96 - DMA3_CH1"] DMA3_CH1 = 96, #[doc = "97 - DMA3_CH2"] DMA3_CH2 = 97, #[doc = "98 - DMA3_CH3"] DMA3_CH3 = 98, #[doc = "99 - DMA3_CH4"] DMA3_CH4 = 99, #[doc = "100 - DMA3_CH5"] DMA3_CH5 = 100, #[doc = "101 - DMA3_CH6"] DMA3_CH6 = 101, #[doc = "102 - DMA3_CH7"] DMA3_CH7 = 102, #[doc = "103 - DMA3_CH8"] DMA3_CH8 = 103, #[doc = "104 - DMA3_CH9"] DMA3_CH9 = 104, #[doc = "105 - DMA3_CH10"] DMA3_CH10 = 105, #[doc = "106 - DMA3_CH11"] DMA3_CH11 = 106, #[doc = "107 - DMA3_CH12"] DMA3_CH12 = 107, #[doc = "108 - DMA3_CH13"] DMA3_CH13 = 108, #[doc = "109 - DMA3_CH14"] DMA3_CH14 = 109, #[doc = "110 - DMA3_CH15"] DMA3_CH15 = 110, #[doc = "111 - DMA3_CH16"] DMA3_CH16 = 111, #[doc = "112 - DMA3_CH17"] DMA3_CH17 = 112, #[doc = "113 - DMA3_CH18"] DMA3_CH18 = 113, #[doc = "114 - DMA3_CH19"] DMA3_CH19 = 114, #[doc = "115 - DMA3_CH20"] DMA3_CH20 = 115, #[doc = "116 - DMA3_CH21"] DMA3_CH21 = 116, #[doc = "117 - DMA3_CH22"] DMA3_CH22 = 117, #[doc = "118 - DMA3_CH23"] DMA3_CH23 = 118, #[doc = "119 - DMA3_CH24"] DMA3_CH24 = 119, #[doc = "120 - DMA3_CH25"] DMA3_CH25 = 120, #[doc = "121 - DMA3_CH26"] DMA3_CH26 = 121, #[doc = "122 - DMA3_CH27"] DMA3_CH27 = 122, #[doc = "123 - DMA3_CH28"] DMA3_CH28 = 123, #[doc = "124 - DMA3_CH29"] DMA3_CH29 = 124, #[doc = "125 - DMA3_CH30"] DMA3_CH30 = 125, #[doc = "126 - DMA3_CH31"] DMA3_CH31 = 126, #[doc = "127 - DMA4_ERROR"] DMA4_ERROR = 127, #[doc = "128 - DMA4_CH0_CH1_CH32_CH33"] DMA4_CH0_CH1_CH32_CH33 = 128, #[doc = "129 - DMA4_CH2_CH3_CH34_CH35"] DMA4_CH2_CH3_CH34_CH35 = 129, #[doc = "130 - DMA4_CH4_CH5_CH36_CH37"] DMA4_CH4_CH5_CH36_CH37 = 130, #[doc = "131 - DMA4_CH6_CH7_CH38_CH39"] DMA4_CH6_CH7_CH38_CH39 = 131, #[doc = "132 - DMA4_CH8_CH9_CH40_CH41"] DMA4_CH8_CH9_CH40_CH41 = 132, #[doc = "133 - DMA4_CH10_CH11_CH42_CH43"] DMA4_CH10_CH11_CH42_CH43 = 133, #[doc = "134 - DMA4_CH12_CH13_CH44_CH45"] DMA4_CH12_CH13_CH44_CH45 = 134, #[doc = "135 - DMA4_CH14_CH15_CH46_CH47"] DMA4_CH14_CH15_CH46_CH47 = 135, #[doc = "136 - DMA4_CH16_CH17_CH48_CH49"] DMA4_CH16_CH17_CH48_CH49 = 136, #[doc = "137 - DMA4_CH18_CH19_CH50_CH51"] DMA4_CH18_CH19_CH50_CH51 = 137, #[doc = "138 - DMA4_CH20_CH21_CH52_CH53"] DMA4_CH20_CH21_CH52_CH53 = 138, #[doc = "139 - DMA4_CH22_CH23_CH54_CH55"] DMA4_CH22_CH23_CH54_CH55 = 139, #[doc = "140 - DMA4_CH24_CH25_CH56_CH57"] DMA4_CH24_CH25_CH56_CH57 = 140, #[doc = "141 - DMA4_CH26_CH27_CH58_CH59"] DMA4_CH26_CH27_CH58_CH59 = 141, #[doc = "142 - DMA4_CH28_CH29_CH60_CH61"] DMA4_CH28_CH29_CH60_CH61 = 142, #[doc = "143 - DMA4_CH30_CH31_CH62_CH63"] DMA4_CH30_CH31_CH62_CH63 = 143, #[doc = "146 - SINC3_CH0_CH1_CH2_CH3"] SINC3_CH0_CH1_CH2_CH3 = 146, #[doc = "147 - EWM"] EWM = 147, #[doc = "148 - SEMC"] SEMC = 148, #[doc = "149 - LPIT3"] LPIT3 = 149, #[doc = "150 - LPTMR3"] LPTMR3 = 150, #[doc = "151 - TMR4"] TMR4 = 151, #[doc = "152 - LPI2C5"] LPI2C5 = 152, #[doc = "153 - LPI2C6"] LPI2C6 = 153, #[doc = "154 - SAI4"] SAI4 = 154, #[doc = "155 - SPDIF"] SPDIF = 155, #[doc = "156 - LPUART9"] LPUART9 = 156, #[doc = "157 - LPUART10"] LPUART10 = 157, #[doc = "158 - LPUART11"] LPUART11 = 158, #[doc = "159 - LPUART12"] LPUART12 = 159, #[doc = "164 - TMR3"] TMR3 = 164, #[doc = "170 - PWM2_FAULT"] PWM2_FAULT = 170, #[doc = "171 - PWM2_0"] PWM2_0 = 171, #[doc = "172 - PWM2_1"] PWM2_1 = 172, #[doc = "173 - PWM2_2"] PWM2_2 = 173, #[doc = "174 - PWM2_3"] PWM2_3 = 174, #[doc = "175 - PWM3_FAULT"] PWM3_FAULT = 175, #[doc = "176 - PWM3_0"] PWM3_0 = 176, #[doc = "177 - PWM3_1"] PWM3_1 = 177, #[doc = "178 - PWM3_2"] PWM3_2 = 178, #[doc = "179 - PWM3_3"] PWM3_3 = 179, #[doc = "180 - PWM4_FAULT"] PWM4_FAULT = 180, #[doc = "181 - PWM4_0"] PWM4_0 = 181, #[doc = "182 - PWM4_1"] PWM4_1 = 182, #[doc = "183 - PWM4_2"] PWM4_2 = 183, #[doc = "184 - PWM4_3"] PWM4_3 = 184, #[doc = "185 - EQDC1"] EQDC1 = 185, #[doc = "186 - EQDC2"] EQDC2 = 186, #[doc = "187 - EQDC3"] EQDC3 = 187, #[doc = "188 - EQDC4"] EQDC4 = 188, #[doc = "189 - ADC2"] ADC2 = 189, #[doc = "190 - DCDC"] DCDC = 190, #[doc = "191 - CAN3"] CAN3 = 191, #[doc = "192 - CAN3_ERROR"] CAN3_ERROR = 192, #[doc = "193 - DAC"] DAC = 193, #[doc = "194 - LPSPI5"] LPSPI5 = 194, #[doc = "195 - LPSPI6"] LPSPI6 = 195, #[doc = "196 - LPUART7"] LPUART7 = 196, #[doc = "197 - LPUART8"] LPUART8 = 197, #[doc = "198 - SAI2"] SAI2 = 198, #[doc = "199 - SAI3"] SAI3 = 199, #[doc = "200 - ACMP1"] ACMP1 = 200, #[doc = "201 - ACMP2"] ACMP2 = 201, #[doc = "202 - ACMP3"] ACMP3 = 202, #[doc = "203 - ACMP4"] ACMP4 = 203, #[doc = "209 - GPT1"] GPT1 = 209, #[doc = "210 - GPT2"] GPT2 = 210, #[doc = "211 - KPP"] KPP = 211, #[doc = "212 - USBPHY1"] USBPHY1 = 212, #[doc = "213 - USBPHY2"] USBPHY2 = 213, #[doc = "214 - USB_OTG2"] USB_OTG2 = 214, #[doc = "215 - USB_OTG1"] USB_OTG1 = 215, #[doc = "224 - SINC1_CH0"] SINC1_CH0 = 224, #[doc = "225 - SINC1_CH1"] SINC1_CH1 = 225, #[doc = "226 - SINC1_CH2"] SINC1_CH2 = 226, #[doc = "227 - SINC1_CH3"] SINC1_CH3 = 227, #[doc = "228 - SINC2_CH0"] SINC2_CH0 = 228, #[doc = "229 - SINC2_CH1"] SINC2_CH1 = 229, #[doc = "230 - SINC2_CH2"] SINC2_CH2 = 230, #[doc = "231 - SINC2_CH3"] SINC2_CH3 = 231, #[doc = "232 - GPIO4"] GPIO4 = 232, #[doc = "233 - TMR2"] TMR2 = 233, #[doc = "234 - GPIO5"] GPIO5 = 234, #[doc = "235 - ASRC"] ASRC = 235, #[doc = "236 - GPIO6"] GPIO6 = 236, } pub type interrupt = Interrupt; unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt { #[inline(always)] fn number(self) -> u16 { self as u16 } } mod _vectors { unsafe extern "C" { fn TMR1(); fn TMR5(); fn TMR6(); fn TMR7(); fn TMR8(); fn CAN1(); fn CAN1_ERROR(); fn GPIO1_0(); fn GPIO1_1(); fn I3C1(); fn LPI2C1(); fn LPI2C2(); fn LPIT1(); fn LPSPI1(); fn LPSPI2(); fn LPTMR1(); fn LPUART1(); fn LPUART2(); fn MU1(); fn MU2(); fn PWM1_FAULT(); fn PWM1_0(); fn PWM1_1(); fn PWM1_2(); fn PWM1_3(); fn TPM1(); fn TPM2(); fn RTWDOG1(); fn RTWDOG2(); fn TRDC_MGR_AON(); fn PDM_HWVAD_EVENT(); fn PDM_HWVAD_ERROR(); fn PDM_EVENT(); fn PDM_ERROR(); fn SAI1(); fn CAN2(); fn CAN2_ERROR(); fn FLEXIO1(); fn FLEXIO2(); fn FLEXSPI1(); fn FLEXSPI2(); fn GPIO2_0(); fn GPIO2_1(); fn GPIO3_0(); fn GPIO3_1(); fn I3C2(); fn LPI2C3(); fn LPI2C4(); fn LPIT2(); fn LPSPI3(); fn LPSPI4(); fn LPTMR2(); fn LPUART3(); fn LPUART4(); fn LPUART5(); fn LPUART6(); fn BBNSM(); fn TPM3(); fn TPM4(); fn TPM5(); fn TPM6(); fn RTWDOG3(); fn RTWDOG4(); fn RTWDOG5(); fn TRDC_MGR_WKUP(); fn USDHC1(); fn USDHC2(); fn TRDC_MGR_MEGA(); fn ADC1(); fn DMA_ERROR(); fn DMA3_CH0(); fn DMA3_CH1(); fn DMA3_CH2(); fn DMA3_CH3(); fn DMA3_CH4(); fn DMA3_CH5(); fn DMA3_CH6(); fn DMA3_CH7(); fn DMA3_CH8(); fn DMA3_CH9(); fn DMA3_CH10(); fn DMA3_CH11(); fn DMA3_CH12(); fn DMA3_CH13(); fn DMA3_CH14(); fn DMA3_CH15(); fn DMA3_CH16(); fn DMA3_CH17(); fn DMA3_CH18(); fn DMA3_CH19(); fn DMA3_CH20(); fn DMA3_CH21(); fn DMA3_CH22(); fn DMA3_CH23(); fn DMA3_CH24(); fn DMA3_CH25(); fn DMA3_CH26(); fn DMA3_CH27(); fn DMA3_CH28(); fn DMA3_CH29(); fn DMA3_CH30(); fn DMA3_CH31(); fn DMA4_ERROR(); fn DMA4_CH0_CH1_CH32_CH33(); fn DMA4_CH2_CH3_CH34_CH35(); fn DMA4_CH4_CH5_CH36_CH37(); fn DMA4_CH6_CH7_CH38_CH39(); fn DMA4_CH8_CH9_CH40_CH41(); fn DMA4_CH10_CH11_CH42_CH43(); fn DMA4_CH12_CH13_CH44_CH45(); fn DMA4_CH14_CH15_CH46_CH47(); fn DMA4_CH16_CH17_CH48_CH49(); fn DMA4_CH18_CH19_CH50_CH51(); fn DMA4_CH20_CH21_CH52_CH53(); fn DMA4_CH22_CH23_CH54_CH55(); fn DMA4_CH24_CH25_CH56_CH57(); fn DMA4_CH26_CH27_CH58_CH59(); fn DMA4_CH28_CH29_CH60_CH61(); fn DMA4_CH30_CH31_CH62_CH63(); fn SINC3_CH0_CH1_CH2_CH3(); fn EWM(); fn SEMC(); fn LPIT3(); fn LPTMR3(); fn TMR4(); fn LPI2C5(); fn LPI2C6(); fn SAI4(); fn SPDIF(); fn LPUART9(); fn LPUART10(); fn LPUART11(); fn LPUART12(); fn TMR3(); fn PWM2_FAULT(); fn PWM2_0(); fn PWM2_1(); fn PWM2_2(); fn PWM2_3(); fn PWM3_FAULT(); fn PWM3_0(); fn PWM3_1(); fn PWM3_2(); fn PWM3_3(); fn PWM4_FAULT(); fn PWM4_0(); fn PWM4_1(); fn PWM4_2(); fn PWM4_3(); fn EQDC1(); fn EQDC2(); fn EQDC3(); fn EQDC4(); fn ADC2(); fn DCDC(); fn CAN3(); fn CAN3_ERROR(); fn DAC(); fn LPSPI5(); fn LPSPI6(); fn LPUART7(); fn LPUART8(); fn SAI2(); fn SAI3(); fn ACMP1(); fn ACMP2(); fn ACMP3(); fn ACMP4(); fn GPT1(); fn GPT2(); fn KPP(); fn USBPHY1(); fn USBPHY2(); fn USB_OTG2(); fn USB_OTG1(); fn SINC1_CH0(); fn SINC1_CH1(); fn SINC1_CH2(); fn SINC1_CH3(); fn SINC2_CH0(); fn SINC2_CH1(); fn SINC2_CH2(); fn SINC2_CH3(); fn GPIO4(); fn TMR2(); fn GPIO5(); fn ASRC(); fn GPIO6(); } pub union Vector { _handler: unsafe extern "C" fn(), _reserved: u32, } #[cfg_attr(target_os = "none", unsafe(link_section = ".vector_table.interrupts"))] #[unsafe(no_mangle)] pub static __INTERRUPTS: [Vector; 237] = [ Vector { _handler: TMR1 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _handler: TMR5 }, Vector { _handler: TMR6 }, Vector { _handler: TMR7 }, Vector { _handler: TMR8 }, Vector { _handler: CAN1 }, Vector { _handler: CAN1_ERROR, }, Vector { _handler: GPIO1_0 }, Vector { _handler: GPIO1_1 }, Vector { _handler: I3C1 }, Vector { _handler: LPI2C1 }, Vector { _handler: LPI2C2 }, Vector { _handler: LPIT1 }, Vector { _handler: LPSPI1 }, Vector { _handler: LPSPI2 }, Vector { _handler: LPTMR1 }, Vector { _handler: LPUART1 }, Vector { _handler: LPUART2 }, Vector { _handler: MU1 }, Vector { _handler: MU2 }, Vector { _handler: PWM1_FAULT, }, Vector { _handler: PWM1_0 }, Vector { _handler: PWM1_1 }, Vector { _handler: PWM1_2 }, Vector { _handler: PWM1_3 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _handler: TPM1 }, Vector { _handler: TPM2 }, Vector { _handler: RTWDOG1 }, Vector { _handler: RTWDOG2 }, Vector { _handler: TRDC_MGR_AON, }, Vector { _handler: PDM_HWVAD_EVENT, }, Vector { _handler: PDM_HWVAD_ERROR, }, Vector { _handler: PDM_EVENT, }, Vector { _handler: PDM_ERROR, }, Vector { _handler: SAI1 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _handler: CAN2 }, Vector { _handler: CAN2_ERROR, }, Vector { _handler: FLEXIO1 }, Vector { _handler: FLEXIO2 }, Vector { _handler: FLEXSPI1 }, Vector { _handler: FLEXSPI2 }, Vector { _handler: GPIO2_0 }, Vector { _handler: GPIO2_1 }, Vector { _handler: GPIO3_0 }, Vector { _handler: GPIO3_1 }, Vector { _handler: I3C2 }, Vector { _handler: LPI2C3 }, Vector { _handler: LPI2C4 }, Vector { _handler: LPIT2 }, Vector { _handler: LPSPI3 }, Vector { _handler: LPSPI4 }, Vector { _handler: LPTMR2 }, Vector { _handler: LPUART3 }, Vector { _handler: LPUART4 }, Vector { _handler: LPUART5 }, Vector { _handler: LPUART6 }, Vector { _reserved: 0 }, Vector { _handler: BBNSM }, Vector { _reserved: 0 }, Vector { _handler: TPM3 }, Vector { _handler: TPM4 }, Vector { _handler: TPM5 }, Vector { _handler: TPM6 }, Vector { _handler: RTWDOG3 }, Vector { _handler: RTWDOG4 }, Vector { _handler: RTWDOG5 }, Vector { _handler: TRDC_MGR_WKUP, }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _handler: USDHC1 }, Vector { _handler: USDHC2 }, Vector { _handler: TRDC_MGR_MEGA, }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _handler: ADC1 }, Vector { _handler: DMA_ERROR, }, Vector { _handler: DMA3_CH0 }, Vector { _handler: DMA3_CH1 }, Vector { _handler: DMA3_CH2 }, Vector { _handler: DMA3_CH3 }, Vector { _handler: DMA3_CH4 }, Vector { _handler: DMA3_CH5 }, Vector { _handler: DMA3_CH6 }, Vector { _handler: DMA3_CH7 }, Vector { _handler: DMA3_CH8 }, Vector { _handler: DMA3_CH9 }, Vector { _handler: DMA3_CH10, }, Vector { _handler: DMA3_CH11, }, Vector { _handler: DMA3_CH12, }, Vector { _handler: DMA3_CH13, }, Vector { _handler: DMA3_CH14, }, Vector { _handler: DMA3_CH15, }, Vector { _handler: DMA3_CH16, }, Vector { _handler: DMA3_CH17, }, Vector { _handler: DMA3_CH18, }, Vector { _handler: DMA3_CH19, }, Vector { _handler: DMA3_CH20, }, Vector { _handler: DMA3_CH21, }, Vector { _handler: DMA3_CH22, }, Vector { _handler: DMA3_CH23, }, Vector { _handler: DMA3_CH24, }, Vector { _handler: DMA3_CH25, }, Vector { _handler: DMA3_CH26, }, Vector { _handler: DMA3_CH27, }, Vector { _handler: DMA3_CH28, }, Vector { _handler: DMA3_CH29, }, Vector { _handler: DMA3_CH30, }, Vector { _handler: DMA3_CH31, }, Vector { _handler: DMA4_ERROR, }, Vector { _handler: DMA4_CH0_CH1_CH32_CH33, }, Vector { _handler: DMA4_CH2_CH3_CH34_CH35, }, Vector { _handler: DMA4_CH4_CH5_CH36_CH37, }, Vector { _handler: DMA4_CH6_CH7_CH38_CH39, }, Vector { _handler: DMA4_CH8_CH9_CH40_CH41, }, Vector { _handler: DMA4_CH10_CH11_CH42_CH43, }, Vector { _handler: DMA4_CH12_CH13_CH44_CH45, }, Vector { _handler: DMA4_CH14_CH15_CH46_CH47, }, Vector { _handler: DMA4_CH16_CH17_CH48_CH49, }, Vector { _handler: DMA4_CH18_CH19_CH50_CH51, }, Vector { _handler: DMA4_CH20_CH21_CH52_CH53, }, Vector { _handler: DMA4_CH22_CH23_CH54_CH55, }, Vector { _handler: DMA4_CH24_CH25_CH56_CH57, }, Vector { _handler: DMA4_CH26_CH27_CH58_CH59, }, Vector { _handler: DMA4_CH28_CH29_CH60_CH61, }, Vector { _handler: DMA4_CH30_CH31_CH62_CH63, }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _handler: SINC3_CH0_CH1_CH2_CH3, }, Vector { _handler: EWM }, Vector { _handler: SEMC }, Vector { _handler: LPIT3 }, Vector { _handler: LPTMR3 }, Vector { _handler: TMR4 }, Vector { _handler: LPI2C5 }, Vector { _handler: LPI2C6 }, Vector { _handler: SAI4 }, Vector { _handler: SPDIF }, Vector { _handler: LPUART9 }, Vector { _handler: LPUART10 }, Vector { _handler: LPUART11 }, Vector { _handler: LPUART12 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _handler: TMR3 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _handler: PWM2_FAULT, }, Vector { _handler: PWM2_0 }, Vector { _handler: PWM2_1 }, Vector { _handler: PWM2_2 }, Vector { _handler: PWM2_3 }, Vector { _handler: PWM3_FAULT, }, Vector { _handler: PWM3_0 }, Vector { _handler: PWM3_1 }, Vector { _handler: PWM3_2 }, Vector { _handler: PWM3_3 }, Vector { _handler: PWM4_FAULT, }, Vector { _handler: PWM4_0 }, Vector { _handler: PWM4_1 }, Vector { _handler: PWM4_2 }, Vector { _handler: PWM4_3 }, Vector { _handler: EQDC1 }, Vector { _handler: EQDC2 }, Vector { _handler: EQDC3 }, Vector { _handler: EQDC4 }, Vector { _handler: ADC2 }, Vector { _handler: DCDC }, Vector { _handler: CAN3 }, Vector { _handler: CAN3_ERROR, }, Vector { _handler: DAC }, Vector { _handler: LPSPI5 }, Vector { _handler: LPSPI6 }, Vector { _handler: LPUART7 }, Vector { _handler: LPUART8 }, Vector { _handler: SAI2 }, Vector { _handler: SAI3 }, Vector { _handler: ACMP1 }, Vector { _handler: ACMP2 }, Vector { _handler: ACMP3 }, Vector { _handler: ACMP4 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _handler: GPT1 }, Vector { _handler: GPT2 }, Vector { _handler: KPP }, Vector { _handler: USBPHY1 }, Vector { _handler: USBPHY2 }, Vector { _handler: USB_OTG2 }, Vector { _handler: USB_OTG1 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _handler: SINC1_CH0, }, Vector { _handler: SINC1_CH1, }, Vector { _handler: SINC1_CH2, }, Vector { _handler: SINC1_CH3, }, Vector { _handler: SINC2_CH0, }, Vector { _handler: SINC2_CH1, }, Vector { _handler: SINC2_CH2, }, Vector { _handler: SINC2_CH3, }, Vector { _handler: GPIO4 }, Vector { _handler: TMR2 }, Vector { _handler: GPIO5 }, Vector { _handler: ASRC }, Vector { _handler: GPIO6 }, ]; }