#![no_std]

#[repr(C)]
#[allow(non_snake_case)]
pub struct RegisterBlock {
    pub VERID: u32,
    pub PARAM: u32,
    _reserved_0: [u8; 4],
    pub LOCK: u32,
    pub PCNS: u32,
    pub ICNS: u32,
    pub PCNP: u32,
    pub ICNP: u32,
    _reserved_1: [u8; 32],
    pub PDOR: u32,
    pub PSOR: u32,
    pub PCOR: u32,
    pub PTOR: u32,
    pub PDIR: u32,
    pub PDDR: u32,
    pub PIDR: u32,
    _reserved_2: [u8; 4],
    pub PDR: [u8; 32],
    pub ICR: [u32; 32],
    pub GICR: [u32; 2],
    _reserved_3: [u8; 24],
    pub ISFR: [u32; 2],
}

ral_registers::register! {
    #[doc = "Port Data Output Register"]
    pub PDOR<u32> RW []
}

ral_registers::register! {
    #[doc = "Port Set Output Register"]
    pub PSOR<u32> WO []
}

ral_registers::register! {
    #[doc = "Port Clear Output Register"]
    pub PCOR<u32> WO []
}

ral_registers::register! {
    #[doc = "Port Toggle Output Register"]
    pub PTOR<u32> WO []
}

ral_registers::register! {
    #[doc = "Port Data Input Register"]
    pub PDIR<u32> RO []
}

ral_registers::register! {
    #[doc = "Port Data Direction Register"]
    pub PDDR<u32> RW []
}

ral_registers::register! {
    #[doc = "Port Input Disable Register"]
    pub PIDR<u32> RW []
}

ral_registers::register! {
    #[doc = "Port Data Register"]
    pub PDR<u8> RW []
}

ral_registers::register! {
    #[doc = "Interrupt Control Register"]
    pub ICR<u32> RW [
        #[doc = "Interrupt Configuration"]
        IRQC start(16) width(4) RW {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            DISABLED = 0,
            #[doc = "ISF flag and DMA request on rising edge."]
            ISF_DMA_RISING = 0x1,
            #[doc = "ISF flag and DMA request on falling edge."]
            ISF_DMA_FALLING = 0x2,
            #[doc = "ISF flag and DMA request on either edge."]
            ISF_DMA_EITHER = 0x3,
            #[doc = "ISF flag sets on rising edge."]
            ISF_RISING = 0x5,
            #[doc = "ISF flag sets on falling edge."]
            ISF_FALLING = 0x6,
            #[doc = "ISF flag sets on either edge."]
            ISF_EITHER = 0x7,
            #[doc = "ISF flag and Interrupt when logic 0."]
            ISF_INTERRUPT_LOW = 0x8,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            ISF_INTERRUPT_RISING = 0x9,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            ISF_INTERRUPT_FALLING = 0xA,
            #[doc = "ISF flag and Interrupt on either edge."]
            ISF_INTERRUPT_EITHER = 0xB,
            #[doc = "ISF flag and Interrupt when logic 1."]
            ISF_INTERRUPT_HIGH = 0xC,
        }
        #[doc = "Interrupt Select"]
        IRQS start(20) width(1) RW {}
        #[doc = "Lock Register"]
        LK start(23) width(1) RW {}
        #[doc = "Interrupt Status Flag"]
        ISF start(24) width(1) RW {}
    ]
}

ral_registers::register! {
    #[doc = "Global Interrupt Control Register"]
    pub GICR<u32> WO [
        #[doc = "Global Interrupt Write Enable"]
        GIWE start(0) width(16) WO {}
        #[doc = "Interrupt Configuration"]
        IRQC start(16) width(4) WO {
            #[doc = "Interrupt Status Flag (ISF) is disabled."]
            DISABLED = 0,
            #[doc = "ISF flag and DMA request on rising edge."]
            ISF_DMA_RISING = 0x1,
            #[doc = "ISF flag and DMA request on falling edge."]
            ISF_DMA_FALLING = 0x2,
            #[doc = "ISF flag and DMA request on either edge."]
            ISF_DMA_EITHER = 0x3,
            #[doc = "ISF flag sets on rising edge."]
            ISF_RISING = 0x5,
            #[doc = "ISF flag sets on falling edge."]
            ISF_FALLING = 0x6,
            #[doc = "ISF flag sets on either edge."]
            ISF_EITHER = 0x7,
            #[doc = "ISF flag and Interrupt when logic 0."]
            ISF_INTERRUPT_LOW = 0x8,
            #[doc = "ISF flag and Interrupt on rising-edge."]
            ISF_INTERRUPT_RISING = 0x9,
            #[doc = "ISF flag and Interrupt on falling-edge."]
            ISF_INTERRUPT_FALLING = 0xA,
            #[doc = "ISF flag and Interrupt on either edge."]
            ISF_INTERRUPT_EITHER = 0xB,
            #[doc = "ISF flag and Interrupt when logic 1."]
            ISF_INTERRUPT_HIGH = 0xC,
        }
        #[doc = "Interrupt Select"]
        IRQS start(20) width(1) WO {}
        #[doc = "Lock Register"]
        LK start(23) width(1) WO {}
        #[doc = "Interrupt Status Flag"]
        ISF start(24) width(1) WO {}
    ]
}

ral_registers::register! {
    #[doc = "Interrupt Status Flag Register"]
    pub ISFR<u32> RW []
}

#[cfg(test)]
mod tests {
    use super::RegisterBlock;
    use core::mem::offset_of;

    #[test]
    fn layout() {
        assert_eq!(offset_of!(RegisterBlock, ISFR), 0x120);
    }
}