diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/bd.rs | 8 | ||||
| -rw-r--r-- | src/lib.rs | 6 |
2 files changed, 9 insertions, 5 deletions
@@ -76,6 +76,12 @@ unsafe impl<D, const COUNT: usize, const MTU: usize> Sync for IoBuffers<D, COUNT pub type TransmitBuffers<const COUNT: usize, const MTU: usize> = IoBuffers<txbd::TxBD, COUNT, MTU>; pub type ReceiveBuffers<const COUNT: usize, const MTU: usize> = IoBuffers<rxbd::RxBD, COUNT, MTU>; +impl<D, const COUNT: usize, const MTU: usize> Default for IoBuffers<D, COUNT, MTU> { + fn default() -> Self { + Self::new() + } +} + impl<D, const COUNT: usize, const MTU: usize> IoBuffers<D, COUNT, MTU> { const MTU_IS_MULTIPLE_OF_16: () = assert!(MTU % 16 == 0); @@ -91,7 +97,7 @@ impl<D, const COUNT: usize, const MTU: usize> IoBuffers<D, COUNT, MTU> { fn init( &'static mut self, init_descriptors: impl Fn(&mut [D], &mut [DataBuffer<MTU>]), - ) -> IoSlices<D> { + ) -> IoSlices<'static, D> { // Safety: by taking 'static mut reference, we // ensure that we can only be called once. let ring = unsafe { self.ring.init() }; @@ -75,10 +75,8 @@ impl<const N: u8> Enet<N> { ral::write_reg!(ral::enet, enet, RDSR, rx_ring.as_ptr() as _); const SMI_MDC_FREQUENCY_HZ: u32 = 2_500_000; - let mii_speed = - (source_clock_hz + 2 * SMI_MDC_FREQUENCY_HZ - 1) / (2 * SMI_MDC_FREQUENCY_HZ) - 1; - let hold_time = - (10 + 1_000_000_000 / source_clock_hz - 1) / (1_000_000_000 / source_clock_hz) - 1; + let mii_speed = source_clock_hz.div_ceil(2 * SMI_MDC_FREQUENCY_HZ) - 1; + let hold_time = 10_u32.div_ceil(1_000_000_000 / source_clock_hz) - 1; // TODO no way to enable / disable the MII management frame preamble. Maybe a new method // for the user? ral::modify_reg!(ral::enet, enet, MSCR, HOLDTIME: hold_time, MII_SPEED: mii_speed); |