From 48b00ed3b83db5205b848f152f6e3139f5dea4b9 Mon Sep 17 00:00:00 2001 From: Ian McIntyre Date: Thu, 17 Jul 2025 18:10:17 -0400 Subject: Let clippy fix warnings --- src/bd.rs | 8 +++++++- src/lib.rs | 6 ++---- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/src/bd.rs b/src/bd.rs index 1bfe9f7..5508770 100644 --- a/src/bd.rs +++ b/src/bd.rs @@ -76,6 +76,12 @@ unsafe impl Sync for IoBuffers = IoBuffers; pub type ReceiveBuffers = IoBuffers; +impl Default for IoBuffers { + fn default() -> Self { + Self::new() + } +} + impl IoBuffers { const MTU_IS_MULTIPLE_OF_16: () = assert!(MTU % 16 == 0); @@ -91,7 +97,7 @@ impl IoBuffers { fn init( &'static mut self, init_descriptors: impl Fn(&mut [D], &mut [DataBuffer]), - ) -> IoSlices { + ) -> IoSlices<'static, D> { // Safety: by taking 'static mut reference, we // ensure that we can only be called once. let ring = unsafe { self.ring.init() }; diff --git a/src/lib.rs b/src/lib.rs index 895288c..e24ccb7 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -75,10 +75,8 @@ impl Enet { ral::write_reg!(ral::enet, enet, RDSR, rx_ring.as_ptr() as _); const SMI_MDC_FREQUENCY_HZ: u32 = 2_500_000; - let mii_speed = - (source_clock_hz + 2 * SMI_MDC_FREQUENCY_HZ - 1) / (2 * SMI_MDC_FREQUENCY_HZ) - 1; - let hold_time = - (10 + 1_000_000_000 / source_clock_hz - 1) / (1_000_000_000 / source_clock_hz) - 1; + let mii_speed = source_clock_hz.div_ceil(2 * SMI_MDC_FREQUENCY_HZ) - 1; + let hold_time = 10_u32.div_ceil(1_000_000_000 / source_clock_hz) - 1; // TODO no way to enable / disable the MII management frame preamble. Maybe a new method // for the user? ral::modify_reg!(ral::enet, enet, MSCR, HOLDTIME: hold_time, MII_SPEED: mii_speed); -- cgit v1.2.3