imxrt-flash-algos/src, branch main Flash programming algorithms for i.MX RT MCUs https://git.mciantyre.dev/imxrt-flash-algos/atom?h=main 2026-05-23T16:06:46+00:00 Relax AHB start address alignment limitation 2026-05-23T16:06:46+00:00 Ian McIntyre me@mciantyre.dev 2026-05-23T00:17:49+00:00 urn:sha1:7ca00914afa2bf29e0aa9fc8bbf0e69a322a8e14 Without this, unaligned AHB reads may return questionable data. This seems to make a difference on 1000 series MCUs; without it, the taget-gen test reliably fail on 1010 and 1040 MCUs. Not sure why the 1100 series can get away without it. Write the QE bit for ISSI parts 2026-05-23T16:06:31+00:00 Ian McIntyre me@mciantyre.dev 2026-05-14T14:53:05+00:00 urn:sha1:022639f277d08c5b61fc805d57d34cec4efaba5a If it's not already set, our quad reads & writes are not going to work. Add 1010evk target-gen test 2025-12-22T01:17:13+00:00 Ian McIntyre me@mciantyre.dev 2025-12-21T20:37:19+00:00 urn:sha1:135dc4fce370711e51ec6d839fb400e0cda955f9 Consolidate flash algorithm init 2025-12-21T12:38:02+00:00 Ian McIntyre me@mciantyre.dev 2025-12-20T21:48:32+00:00 urn:sha1:b3732747cf52a743d7c4dd4a07479cc533ad5416 Remove deinitialize, flash reset 2025-12-20T20:26:37+00:00 Ian McIntyre me@mciantyre.dev 2025-12-20T18:15:27+00:00 urn:sha1:a800ee097af0c2334318d39dec2c0a40dbd5c0d9 Configure FlexSPI1 pins on 11xx MCUs 2025-12-18T02:28:52+00:00 Ian McIntyre me@mciantyre.dev 2025-12-18T00:33:41+00:00 urn:sha1:fa5b0daeb02bb1775462ac57b353589d983fa2bb Support ISSI LP and WP configs in one algo 2025-12-13T18:39:35+00:00 Ian McIntyre me@mciantyre.dev 2025-12-13T18:30:49+00:00 urn:sha1:7514ffe3b565669f6535ce05826613a884fb0665 The configurations and sequences need to vary depending on the connected part. We can determine the part at runtime to vary the config. We could probably do this for all the parts. Maybe I'll try that later. First commit 2025-12-01T00:56:39+00:00 Ian McIntyre me@mciantyre.dev 2025-12-01T00:56:39+00:00 urn:sha1:635bee2d21704fd76d066be0f66ce2c70ebaacb7