diff options
| -rw-r--r-- | .cargo/1040evk.toml | 14 | ||||
| -rw-r--r-- | imxrt1040/src/lib.rs | 26 | ||||
| -rw-r--r-- | templates/1040evk.yaml | 56 |
3 files changed, 95 insertions, 1 deletions
diff --git a/.cargo/1040evk.toml b/.cargo/1040evk.toml new file mode 100644 index 0000000..4e4b2f3 --- /dev/null +++ b/.cargo/1040evk.toml @@ -0,0 +1,14 @@ +[build] +target = "thumbv7em-none-eabi" + +[target.'cfg(all(target_os = "none", target_arch = "arm"))'] +rustflags = [ + "-Clink-arg=-nmagic", + "-Clink-arg=-Tlink.x", + "-Clink-arg=-Tmemory.x", + "-Clink-arg=-Tdefmt.x", +] +runner = "target-gen test templates/1040evk.yaml target/1040evk.yaml --protocol=swd --chip=mimxrt1040" + +[env] +DEFMT_LOG="off" diff --git a/imxrt1040/src/lib.rs b/imxrt1040/src/lib.rs index c5237c9..66857b7 100644 --- a/imxrt1040/src/lib.rs +++ b/imxrt1040/src/lib.rs @@ -4,7 +4,8 @@ use core::num::NonZero; pub use imxrt_flash_algos::*; -use imxrt1040::{ccm, dcdc, instances}; +use imxrt1040::{ccm, dcdc, instances, iomuxc}; +use ral_registers as ral; const AHB_CONFIG: ccm::AbhConfiguration = ccm::AbhConfiguration { div_sel: 100, @@ -42,9 +43,32 @@ impl imxrt10xx::Imxrt10xx for Imxrt1040 { const FLEXSPI_FIFO_CAPACITY_BYTES: usize = 128; + type IOMUXC = imxrt1040::iomuxc::Instance; + const IOMUXC_INSTANCE: Self::IOMUXC = unsafe { instances::iomuxc() }; + fn configure_clocks(ccm: ccm::CCM, ccm_analog: ccm::CCM_ANALOG, dcdc: dcdc::Instance) { self::configure_clocks(ccm, ccm_analog, dcdc); } + + fn configure_pins(iomuxc: Self::IOMUXC) { + use iomuxc::pad; + + ral::write_reg!(iomuxc, iomuxc, SW_MUX_CTL_PAD[pad::GPIO_SD_B1_05], MUX_MODE: 1, SION: 1); // DQS + ral::write_reg!(iomuxc, iomuxc, SW_MUX_CTL_PAD[pad::GPIO_SD_B1_06], MUX_MODE: 1, SION: 0); + ral::write_reg!(iomuxc, iomuxc, SW_MUX_CTL_PAD[pad::GPIO_SD_B1_07], MUX_MODE: 1, SION: 1); // SCK + ral::write_reg!(iomuxc, iomuxc, SW_MUX_CTL_PAD[pad::GPIO_SD_B1_08], MUX_MODE: 1, SION: 0); + ral::write_reg!(iomuxc, iomuxc, SW_MUX_CTL_PAD[pad::GPIO_SD_B1_09], MUX_MODE: 1, SION: 0); + ral::write_reg!(iomuxc, iomuxc, SW_MUX_CTL_PAD[pad::GPIO_SD_B1_10], MUX_MODE: 1, SION: 0); + ral::write_reg!(iomuxc, iomuxc, SW_MUX_CTL_PAD[pad::GPIO_SD_B1_11], MUX_MODE: 1, SION: 0); + + ral::write_reg!(iomuxc, iomuxc, SW_PAD_CTL_PAD[pad::GPIO_SD_B1_05], PUE: 1, PKE: 1, SPEED: MEDIUM_100MHZ, DSE: R0, PUS: PD_100K_OHM); // DQS + ral::write_reg!(iomuxc, iomuxc, SW_PAD_CTL_PAD[pad::GPIO_SD_B1_06], PUE: 0, PKE: 0, SPEED: MEDIUM_100MHZ, DSE: R0); + ral::write_reg!(iomuxc, iomuxc, SW_PAD_CTL_PAD[pad::GPIO_SD_B1_07], PUE: 0, PKE: 0, SPEED: MEDIUM_100MHZ, DSE: R0); + ral::write_reg!(iomuxc, iomuxc, SW_PAD_CTL_PAD[pad::GPIO_SD_B1_08], PUE: 0, PKE: 0, SPEED: MEDIUM_100MHZ, DSE: R0); + ral::write_reg!(iomuxc, iomuxc, SW_PAD_CTL_PAD[pad::GPIO_SD_B1_09], PUE: 0, PKE: 0, SPEED: MEDIUM_100MHZ, DSE: R0); + ral::write_reg!(iomuxc, iomuxc, SW_PAD_CTL_PAD[pad::GPIO_SD_B1_10], PUE: 0, PKE: 0, SPEED: MEDIUM_100MHZ, DSE: R0); + ral::write_reg!(iomuxc, iomuxc, SW_PAD_CTL_PAD[pad::GPIO_SD_B1_11], PUE: 0, PKE: 0, SPEED: MEDIUM_100MHZ, DSE: R0); + } } pub type Algorithm<const FLASH_SIZE_BYTES: usize> = diff --git a/templates/1040evk.yaml b/templates/1040evk.yaml new file mode 100644 index 0000000..8f7846f --- /dev/null +++ b/templates/1040evk.yaml @@ -0,0 +1,56 @@ +name: MIMXRT1040 series +manufacturer: + id: 0x15 + cc: 0x0 +variants: + - name: MIMXRT1040 + cores: + - name: main + type: armv7em + core_access_options: !Arm + ap: !v1 0 + memory_map: + - !Ram + name: DTCM + range: + start: 0x20000000 + end: 0x20008000 + access: + boot: false + cores: + - main + - !Nvm + name: FLEXSPI1 + range: + start: 0x60000000 + end: 0x61000000 + access: + boot: true + cores: + - main + flash_algorithms: + - imxrt1040evk +flash_algorithms: + - name: imxrt1040evk + description: A flash algorithm under test + cores: + - main + default: true + instructions: sLUURgxNSEYAIUFRQBlBYIFgwWAQRgDwK/oAKATQSUZJGYhgzGCwvUhGQBkBIUFgAkgBYAAgsL0EAAAACAYAQBC1BEYAIADwE/oNSUpGURgAKALQiGDMYALgiWgAKQ3QCEkBIgpgBkpLRpxYTGCaGFNoi2CTaMtg0mgKYRC9wEYEAAAAAEAAILC1DUhJRgEiClAIGAAkRGCEYMRgBeAgRgDwFvoA8I75BBkA8Iv5BUYA8I75aEOEQvHTACCwvcBGBAAAAPi1BEYXTkhGAieHUYAZACFBYIFgwWAA8HP5AUYgRgDwD/pIRgApAtCAGQMhFeCAGQEhQWAA8GT5BUYA8Gf5aEOgQgfZSEaAGUdgIEYA8N75ACAF4EhGgBkEIYFgxGABIAGw8L0EAAAA/rUORgdGNExIRgMlBVEAGQAhQWCBYMFguAcE0EhGABkDIYFgCuBIRgAZASFBYLAHC9BIRgAZAyGBYDdGSEYAGcdgASYwRgOw8L0CkkhGABkCIUFgAPAg+QGQAPAj+QGZSEO4QhTZSEYAGUVgJUb0GQDwEvkBkADwFfkBmUhDhEIK2UhGQBkEIYFgJ0YsRtXnSEYAGQQhxOdIRkAZBCFBYLAIAZAAJjxGNUYJ4CBoQBwK0QKZAckCkQHEAPBf+W0cAZiFQvLTvedIRgNMABkFIYFgfxmy58BGBAAAAP61FUYERjVKSEYEJ4dQgBgAJkZghmDGYKAHW9GIBwXQSEaAGAMhgWDEYFPgApFIRoAYASFBYADwwfgBkADwxPgBmUhDoEIe2UhGJElAGAIhQWACmAAZAZAA8LD4AJAA8LP4AZkAmlBDgUIU2UhGG0qAGIdgwWAA8KH4BUYA8KT4BEZsQybgSEYUSUAYAyGBYAKZwWAe4EhGEElAGEdg8EOBAGIYApmJCEAcFB0rHYhCCtItaFJoqkIiRh1G9NBIRgZJQBgGIa7nSEYESUAYBSFBYAGcIEYDsPC9wEYEAAAA/rUWRg1GBEYtT0hGBSHBUcAZACFBYIFgwWCgBwTQSEbAGQMhgWAK4EhGwBkBIUFgqAcK0EhGwBkDIYFgLEZIRsAZxGABIAOw8L1IRsAZAyFBYADwQ/gCkADwRvgCmUhDoEIW2UhGwBkEIQCRQWAoGQKQAPAz+AGQAPA2+AKaAZlIQ4JCCdlIRsAZBCGBYBRG1edIRsAZBCHE50hGwBkAmUFgYR4AIAJGqkLM0kwcUhxJeLFCIUb30EhGwBkFIbHnBAAAAA8gAAIDSUpoEgICQAh4EENwR8BG4A8A8AFIAGhwR8BGEAAAEAFIAGhwR8BGFAAAEAZIQWj/IhFCBtAFSQpoACBSHADQCGhwRwBocEcoAAAQABAAEP8gAAIDSQloAUAAIEAaSEFwR8BGBBAAEBC1EUlKaP8jGkIG0A9JCmhSHArQC2gBIQ/gC2gAIQMig0IA2BFGCEYQvQlKE2gDIQhMo0IF0VNoAiEDIoNCANgRRsiyEL3ARigAABAAEAAQBDAAANvlsVEBRgEgAykJ2IgABaEIWAhJCGAISQpoACAAKvvQcEfARgAAAAACAAAAAQAAAAAAAAAE5QFAAOQBQAJIAWgAKfzQcEfARgDkAUADSAEhAWADSAFoACn80HBHDOUBQADkAUADSQhgA0gBaAAp/NBwR8BGCOUBQADkAUAESAEhAWAESAFoACn80AAgcEfARhTlAUAA5AFAACIDCYtCLNMDCotCEdMAI5xGTuADRgtDPNQAIkMIi0Ix0wMJi0Ic0wMKi0IB05RGP+DDCYtCAdPLAcAaUkGDCYtCAdOLAcAaUkFDCYtCAdNLAcAaUkEDCYtCAdMLAcAaUkHDCItCAdPLAMAaUkGDCItCAdOLAMAaUkFDCItCAdNLAMAaUkFBGgDSAUZSQRBGcEdd4MoPANBJQgMQANNAQlNAnEYAIgMJi0It0wMKi0IS04kB/CISugMKi0IM04kBkhGLQgjTiQGSEYtCBNOJATrQkhEA4IkJwwmLQgHTywHAGlJBgwmLQgHTiwHAGlJBQwmLQgHTSwHAGlJBAwmLQgHTCwHAGlJBwwiLQgHTywDAGlJBgwiLQgHTiwDAGlJB2dJDCItCAdNLAMAaUkFBGgDSAUZSQRBGY0ZbEAHTQEIAKwDVSUJwR2NGWxAA00BCAbUAIMBGwEYCvQAAAAAAAAAAAAAAAAAAAAAAAAAAAAA= + pc_init: 0x0 + pc_uninit: 0x0 + pc_program_page: 0x0 + pc_erase_sector: 0x0 + pc_erase_all: 0x0 + data_section_offset: 0x0 + flash_properties: + address_range: + start: 0x0 + end: 0x0 + page_size: 0x0 + erased_byte_value: 0x0 + program_page_timeout: 0x0 + erase_sector_timeout: 0x0 + sectors: + - size: 0x0 + address: 0x0 |