From 022639f277d08c5b61fc805d57d34cec4efaba5a Mon Sep 17 00:00:00 2001
From: Ian McIntyre <me@mciantyre.dev>
Date: Thu, 14 May 2026 10:53:05 -0400
Subject: Write the QE bit for ISSI parts

If it's not already set, our quad reads & writes are not going to work.
---
 src/lib.rs | 42 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

(limited to 'src/lib.rs')

diff --git a/src/lib.rs b/src/lib.rs
index eeaa022..eb2963d 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -22,6 +22,7 @@ pub mod flash {
 
     const READ_ID_JEDEC_ID: IpCmd = IpCmd::new(SeqId::Seq04, 1).unwrap();
     const READ_READ_PARAMS: IpCmd = IpCmd::new(SeqId::Seq02, 1).unwrap();
+    const WRITE_STATUS: IpCmd = IpCmd::new(SeqId::Seq07, 2).unwrap();
 
     const PAGE_SIZE_BYTES: usize = 256;
 
@@ -68,6 +69,18 @@ pub mod flash {
         status[0]
     }
 
+    /// Write the part's status register.
+    fn write_status(flexspi: flexspi::Instance, status: u8) {
+        let status = [status];
+        crate::start_ip_cmd(flexspi, WRITE_STATUS, 0, &status);
+        crate::transmit_bytes(flexspi, &status);
+        crate::wait_for_ip_cmd_done(flexspi);
+        crate::clear_tx_fifo(flexspi);
+        crate::wait_for_idle(flexspi);
+
+        wait_for_wip_clear(flexspi);
+    }
+
     /// Read data from the flash array starting at `flash_start`.
     ///
     /// The implementation handles reads into the middle of pages, along
@@ -268,6 +281,24 @@ pub mod flash {
         }
     }
 
+    /// Prepare this flash part to execute all IP commands.
+    ///
+    /// Runs after installing all IP commands.
+    fn prepare_flash(flexspi: flexspi::Instance, flash: FlashKind) {
+        match flash {
+            // Our algo's read and write sequences expect quad I/O.
+            // Set the quad enable (QE) bit. This will persist the
+            // bit for the next user, but they're free to clear it.
+            FlashKind::Is25lp | FlashKind::Is25wp => {
+                const QE_BIT: u8 = 1 << 6;
+                let mut status = read_status(flexspi);
+                status |= QE_BIT;
+                write_status(flexspi, status);
+            }
+            FlashKind::At25sf | FlashKind::W25q => {}
+        }
+    }
+
     use super::sequences::common as sequences;
 
     pub fn initialize(
@@ -354,6 +385,17 @@ pub mod flash {
                 &[sequences::SEQ_WRITE_ENABLE, sequences::SEQ_ERASE_CHIP]
             ))
         );
+
+        defmt::assert_eq!(
+            WRITE_STATUS,
+            defmt::unwrap!(crate::install_ip_cmd(
+                flexspi,
+                WRITE_STATUS.seq_id,
+                &[sequences::SEQ_WRITE_ENABLE, sequences::SEQ_WRITE_STATUS]
+            ))
+        );
+
+        prepare_flash(flexspi, flash);
     }
 }
 
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