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<title>imxrt-rt, branch main</title>
<subtitle>i.MX RT Runtime Support
</subtitle>
<id>https://git.mciantyre.dev/imxrt-rt/atom?h=main</id>
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<updated>2025-11-26T15:49:21+00:00</updated>
<entry>
<title>Update cortex-m-rt to 0.7.5</title>
<updated>2025-11-26T15:49:21+00:00</updated>
<author>
<name>Ian McIntyre</name>
<email>me@mciantyre.dev</email>
</author>
<published>2025-06-14T18:48:59+00:00</published>
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<id>urn:sha1:2fec327652c16c0352473f9a36152493630a7f57</id>
<content type='text'>
There's an unreleased commit upstream to support stack painting with
custom memory layouts, like ours. I eagerly defined the _stack_end
symbol. Tested on hardware.
</content>
</entry>
<entry>
<title>Let users change name of included device.x file</title>
<updated>2025-11-26T15:49:04+00:00</updated>
<author>
<name>Ian McIntyre</name>
<email>me@mciantyre.dev</email>
</author>
<published>2025-11-26T14:22:06+00:00</published>
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<id>urn:sha1:eb47674359ea27cc5e7824a234067491ff01ab13</id>
<content type='text'>
Alternate PAC designs might describe the device file with a custom / chip
specific name. This change lets users specify which linker script they're
using.
</content>
</entry>
<entry>
<title>Allow smaller vector tables in tests</title>
<updated>2025-11-26T15:49:04+00:00</updated>
<author>
<name>Ian McIntyre</name>
<email>me@mciantyre.dev</email>
</author>
<published>2025-11-26T15:17:14+00:00</published>
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<id>urn:sha1:8b0d5278b0de5254a242f8a356f061949a896161</id>
<content type='text'>
The vector tables exported by imxrt-ral are smaller than the default
cortex-m-rt vector table. The tests fail once we enable the rt / device
features. With this change, we expect the MCU-dependent vector table sizes.
</content>
</entry>
<entry>
<title>Add builder API for FlexRAM bank layout</title>
<updated>2025-11-22T16:20:32+00:00</updated>
<author>
<name>Ian McIntyre</name>
<email>me@mciantyre.dev</email>
</author>
<published>2025-11-09T16:53:17+00:00</published>
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<id>urn:sha1:c4ee315a20e41c234d2d0f7ca3ed7e37a09b9d32</id>
<content type='text'>
The layout, or assignment of FlexRAM banks to memory regions, is more
precise than the count. When a user specifies the count, we still apply
the same layout as we always have. But now, by default, we prefer the
fuse layout for users who have made no choice.

This commit supports RAM loading with probe-rs. After probe-rs resets
the MCU and uses the fuse FlexRAM layout, firmware can perfectly match
that layout without disrupting the data already copied into RAM by the
debugger.
</content>
</entry>
<entry>
<title>Assert that the reset handler is in the binary</title>
<updated>2025-11-11T13:24:39+00:00</updated>
<author>
<name>Ian McIntyre</name>
<email>ianpmcintyre@gmail.com</email>
</author>
<published>2023-03-13T13:38:22+00:00</published>
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<id>urn:sha1:3a6bbd912c92c277611c7cea5780eb9afb04e451</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Prototype API to build runtime in RAM</title>
<updated>2025-11-11T13:24:38+00:00</updated>
<author>
<name>Ian McIntyre</name>
<email>ianpmcintyre@gmail.com</email>
</author>
<published>2023-03-13T10:50:57+00:00</published>
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<id>urn:sha1:6f5633761528e484e8d0963c7ac59403f7210093</id>
<content type='text'>
Just a proof-of-concept. The new inspect_elf test seems to show that
we're building the correct image. We need another commit in order to
help the program run in FlexRAM.
</content>
</entry>
<entry>
<title>Hexify family ID in linker script</title>
<updated>2025-11-10T14:54:18+00:00</updated>
<author>
<name>Ian McIntyre</name>
<email>me@mciantyre.dev</email>
</author>
<published>2025-11-09T15:26:03+00:00</published>
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<id>urn:sha1:74d463340a87ff38a96c03a380bbed7c3ee56ba4</id>
<content type='text'>
Missed in the previous hexification commit.
</content>
</entry>
<entry>
<title>Fix latest clippy warnings</title>
<updated>2025-09-23T11:52:54+00:00</updated>
<author>
<name>Ian McIntyre</name>
<email>me@mciantyre.dev</email>
</author>
<published>2025-09-23T11:52:40+00:00</published>
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<id>urn:sha1:439036a6f49663e99779b7c88209999e2b34d28f</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Use a macro for assembly copy loops</title>
<updated>2025-09-16T11:48:07+00:00</updated>
<author>
<name>Ian McIntyre</name>
<email>me@mciantyre.dev</email>
</author>
<published>2025-06-14T15:23:18+00:00</published>
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<id>urn:sha1:aed7296b291c6430e24e6bd4c787cd724830d956</id>
<content type='text'>
Make it easier to write loops for other sections. Since the macro
expands to the same instructions that we previously had, we can show
that a binary is equivalent before and after this change. Let's use the
binaries generated in this test suite.

Before this change, run the bash script below. Re-run this script with
this change, and show that the hashes for the binaries are the same.

    cargo clean
    cargo test inspect_elf -- --include-ignored --exact imxrt1010evk imxrt1170evk_cm7 imxrt1170evk_cm7_nonboot teensy4 teensy4_fake_dcd 2&gt; /dev/null 1&gt;/dev/null

    for test_binary in imxrt1010evk imxrt1170evk-cm7 imxrt1170evk-cm7-nonboot teensy4 __dcd;
    do
        cat target/${test_binary}/thumbv7em-none-eabihf/debug/examples/blink-rtic | sha256sum -;
    done
</content>
</entry>
<entry>
<title>Hexify the family ID</title>
<updated>2025-09-16T11:48:07+00:00</updated>
<author>
<name>Ian McIntyre</name>
<email>me@mciantyre.dev</email>
</author>
<published>2025-06-14T14:46:32+00:00</published>
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<id>urn:sha1:b91a6a6f11e014f96c91e5a67bef805349de7b43</id>
<content type='text'>
Makes it a little easier for me to manually inspect binaries and figure
out their targets.
</content>
</entry>
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