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The layout, or assignment of FlexRAM banks to memory regions, is more
precise than the count. When a user specifies the count, we still apply
the same layout as we always have. But now, by default, we prefer the
fuse layout for users who have made no choice.
This commit supports RAM loading with probe-rs. After probe-rs resets
the MCU and uses the fuse FlexRAM layout, firmware can perfectly match
that layout without disrupting the data already copied into RAM by the
debugger.
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The runtime previously allowed function placement at address 0 in ITCM.
However, if you ever formed a pointer to the function placed there, it
would look like a null pointer. And you would never be able to call that
function if you relied on null pointer optimization. Also, most MCU
reference manuals (RM) recommend against this placement.
This commit reduces the total capacity of ITCM by 32 bytes, the smallest
possible size of a MPU region. Note that this is greater than the RM's
recommendation of a four byte reservation. It affects all supported
MCUs, except the 1180. If you're so inclined, your MPU could disallow
loads, stores, and execution from this reservation.
Revised unit tests should cover this change. Additionally, you can
manually verify that the ITCM region lengths are reduced by 32 bytes by
opening the linker scripts generated by the ELF test suite.
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Applications linked through this builder can be placed in a flash
reservation. You'll need some other software to launch these programs,
since they lack the boot header required by the NXP boot ROM.
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We added the `.xip` section to ensure that the reset handler and
pre-init functions would be placed in flash. This commit lets users
place other content into that section.
`.xip` is intended for instructions. The runtime builder will place
these instructions into the same load region as `.text`. However,
there's no pre-`main` relocation.
Aligning the `.xip` and the `.text` section produces more predictable
behavior between GNU's ld and LLVM's lld.
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Given the way this package abuses cortex-m-rt, it's not immediately
obvious how to register a Cortex-M exception handler with the
`#[exception]` macro. This commit documents and demonstrates the
workaround I use.
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Implemented by following the reference manual, and tested on an
MIMXRT1160EVK. The target adopts all of the same limitations as the 1170
target.
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I derived these values from the reference manual. Tested on an
MIMXRT1040EVK.
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The 1180 family uses a different boot header than previous families. The
header is generated to support the default configuration where hash and
signature errors are ignored.
The XIP `__pre_init` strategy is still used, more for ease of getting
something running than because of any known problems with the boot ROM's
implementation of loading images to different memories.
The boot ROM for the 1180 does not appear to allow the entry point to
lie outside the (loaded or execute-in-place) image, so a new `.xip`
section is added after the vector table to put the address inside the
image while keeping VMA=LMA. This could cause problems for tools that
manipulate binaries based on section names.
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If you define a runtime, you can call `stack_size_env_override` to
define an optional environment variable checked by the runtime builder.
Same goes for the heap. A user can set these environment variables to
override the runtime's stack / heap size. You can use this package's
examples to try it out; see the updated build script.
There's no default environment variable for either memory region. The
package that defines the runtime needs to opt-in to this feature.
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Users can define their device configuration data (DCD), and place the
data in the .dcd section. If the .dcd section has content, the entry in
the IVT points at the user's DCD. This plays well with imxrt-dcd.
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