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<title>rtic/ci/expected/lm3s6965, branch main</title>
<subtitle>Real-Time Interrupt-driven Concurrency (RTIC) framework for ARM Cortex-M microcontrollers
</subtitle>
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<updated>2025-07-02T18:34:20+00:00</updated>
<entry>
<title>ci: Generate and store example filesizes</title>
<updated>2025-07-02T18:34:20+00:00</updated>
<author>
<name>Henrik Tjäder</name>
<email>henrik@tjaders.com</email>
</author>
<published>2025-06-25T18:56:00+00:00</published>
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<entry>
<title>feat: example of wait-queue</title>
<updated>2025-06-15T09:03:30+00:00</updated>
<author>
<name>Oleksandr Babak</name>
<email>alexanderbabak@proton.me</email>
</author>
<published>2025-05-15T12:52:26+00:00</published>
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<entry>
<title>fix(doc): fix typo in file names to match with docs</title>
<updated>2025-04-01T20:32:14+00:00</updated>
<author>
<name>Christian Krenslehner</name>
<email>christian.krenslehner@sloc.one</email>
</author>
<published>2025-04-01T11:10:10+00:00</published>
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<entry>
<title>fix(ci): adjust filenames for ouputs</title>
<updated>2025-03-27T14:47:11+00:00</updated>
<author>
<name>Oleksandr Babak</name>
<email>alexanderbabak@proton.me</email>
</author>
<published>2025-03-27T10:33:09+00:00</published>
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<entry>
<title>RISC-V support over CLINT (#815)</title>
<updated>2024-03-20T20:06:47+00:00</updated>
<author>
<name>Román Cárdenas Rodríguez</name>
<email>rcardenas.rod@gmail.com</email>
</author>
<published>2024-03-20T20:06:47+00:00</published>
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* Rebase to master

* using interrupt_mod

* bug fixes

* fix other backends

* Add changelog

* forgot about rtic-macros

* backend-specific configuration

* core peripherals optional over macro argument

* pre_init_preprocessing binding

* CI for RISC-V (WIP)

* separation of concerns

* add targets for RISC-V examples

* remove qemu feature

* prepare examples folder

* move examples all together

* move ci out of examples

* minor changes

* add cortex-m

* new xtask: proof of concept

* fix build.yml

* feature typo

* clean rtic examples

* reproduce weird issue

* remove unsafe code in user app

* update dependencies

* allow builds on riscv32imc

* let's fix QEMU

* Update .github/workflows/build.yml

Co-authored-by: Henrik Tjäder &lt;henrik@tjaders.com&gt;

* New build.rs

* removing test features

* adapt ui test to new version of clippy

* add more examples to RISC-V backend

* proper configuration of heapless for riscv32imc

* opt-out examples for riscv32imc

* point to new version of riscv-slic

* adapt new macro bindings

* adapt examples and CI to stable

* fix cortex-m CI

* Review

---------

Co-authored-by: Henrik Tjäder &lt;henrik@tjaders.com&gt;</content>
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