rtic/ci, branch main

ci: Generate and store example filesizes

2025-07-02T18:34:20+00:00

feat: example of wait-queue

2025-06-15T09:03:30+00:00

CI: ESP32: Update expected outputs

2025-04-01T20:32:53+00:00

fix(doc): fix typo in file names to match with docs

2025-04-01T20:32:14+00:00

fix(ci): adjust filenames for ouputs

2025-03-27T14:47:11+00:00

Update support/example for ESP32-C3 to use latest versions of dependencies (#975)

2024-10-16T19:29:51+00:00

* Update `rtic` package to use latest version of `esp32c3` dependency * Update `rtic-macros` ESP32-C3 bindings to reflect changes in HAL * Update the ESP32-C3 examples to use latest versions of all dependencies * Update changelogs * adjust expected qemu output, add compile-time checks * remove runtime checks, this is checked at compile time * fix expected qemu output * Clean up interrupt enable code a bit * Update `rtic-monotonic` to use the latest PAC for ESP32-C3 * Update `CHANGELOG.md` for `rtic-monotonic` * ci: esp32c3: Format runner.sh * ci: esp32c3: Default to silent boot export DEBUGGING while running to get verbose boot env DEBUGGING=1 cargo xtask ... * ci: esp32c3: Update expected example output --------- Co-authored-by: onsdagens Co-authored-by: Henrik Tjäder

Add SYSTIMER based ESP32-C3 monotonic (#972)

2024-09-29T04:21:14+00:00

* add esp32c3 monotonic * fix tests

Monotonic rewrite (#874)

2024-04-10T22:00:38+00:00

* Rework timer_queue and monotonic architecture Goals: * make Monotonic purely internal * make Monotonic purely tick passed, no fugit involved * create a wrapper struct in the user's code via a macro that then converts the "now" from the tick based monotonic to a fugit based timestamp We need to proxy the delay functions of the timer queue anyway, so we could simply perform the conversion in those proxy functions. * Update cargo.lock * Update readme of rtic-time * CI: ESP32: Redact esp_image: Too volatile * Fixup: Changelog double entry rebase mistake --------- Co-authored-by: Henrik Tjäder

CI: Add ESP32-C3 QEMU support (#914)

2024-04-10T18:35:14+00:00

* CI: ESP32-C3: QEMU support * CI: ESP32C3: Script for preparing and running * CI: gitignore qemu.log * ESP32-C3: Example sw_and_hw output

RISC-V support over CLINT (#815)

2024-03-20T20:06:47+00:00

* Rebase to master * using interrupt_mod * bug fixes * fix other backends * Add changelog * forgot about rtic-macros * backend-specific configuration * core peripherals optional over macro argument * pre_init_preprocessing binding * CI for RISC-V (WIP) * separation of concerns * add targets for RISC-V examples * remove qemu feature * prepare examples folder * move examples all together * move ci out of examples * minor changes * add cortex-m * new xtask: proof of concept * fix build.yml * feature typo * clean rtic examples * reproduce weird issue * remove unsafe code in user app * update dependencies * allow builds on riscv32imc * let's fix QEMU * Update .github/workflows/build.yml Co-authored-by: Henrik Tjäder * New build.rs * removing test features * adapt ui test to new version of clippy * add more examples to RISC-V backend * proper configuration of heapless for riscv32imc * opt-out examples for riscv32imc * point to new version of riscv-slic * adapt new macro bindings * adapt examples and CI to stable * fix cortex-m CI * Review --------- Co-authored-by: Henrik Tjäder