rtic/macros/src/codegen, branch main Real-Time Interrupt-driven Concurrency (RTIC) framework for ARM Cortex-M microcontrollers https://git.mciantyre.dev/rtic/atom?h=main 2023-02-28T23:33:31+00:00 Add rtic-timer (timerqueue + monotonic) and rtic-monotonics (systick-monotonic) 2023-02-28T23:33:31+00:00 Emil Fresk emil.fresk@gmail.com 2023-01-23T19:05:47+00:00 urn:sha1:306aa47170fd59369b7a184924e287dc3706d64d Fix so deny(missing_docs) work 2023-02-28T23:33:30+00:00 Emil Fresk emil.fresk@gmail.com 2023-01-19T12:56:59+00:00 urn:sha1:b8b881f446a226d6f3c4a7db7c9174590b47dbf6 executor update for less unsafe and more clear 2023-02-28T23:33:30+00:00 Per Lindgren per.lindgren@ltu.se 2023-01-12T07:50:12+00:00 urn:sha1:5688a5d332cdaffaca64ade5b138a3676ac7cd32 Async tasks can now take arguments at spawn again 2023-02-28T23:33:30+00:00 Emil Fresk emil.fresk@gmail.com 2023-01-10T20:03:10+00:00 urn:sha1:d6d58b0eb88242cf63724e1420bd29f8a4489916 More work on new spawn/executor 2023-02-28T23:33:29+00:00 Emil Fresk emil.fresk@gmail.com 2023-01-09T20:02:53+00:00 urn:sha1:cd790a94286cdc307d399b7f7a43e305e90de5bf Start CI, disable docs building 2023-02-28T23:33:29+00:00 Emil Fresk emil.fresk@gmail.com 2023-01-08T20:33:44+00:00 urn:sha1:95e494968053a17ac05a0c1cec9d8b2c7d450296 Clippy fixes 2023-02-28T23:33:29+00:00 Emil Fresk emil.fresk@gmail.com 2023-01-08T20:30:53+00:00 urn:sha1:c40c89bb4edc22c4a60d8677c660a9ab7eb47e92 Support 0 prio tasks 2023-02-28T23:33:28+00:00 Emil Fresk emil.fresk@gmail.com 2023-01-08T20:10:06+00:00 urn:sha1:6d252785e83218eeb5d080836281c90b86ca0e03 Fix typos 2023-02-28T23:33:28+00:00 Emil Fresk emil.fresk@gmail.com 2023-01-08T18:16:36+00:00 urn:sha1:9a67f00a30f14df3b9635913f728afd0b40c138d All codegen is now explicit 2023-02-28T23:31:08+00:00 Emil Fresk emil.fresk@gmail.com 2023-01-07T13:26:55+00:00 urn:sha1:76595b7aedd2a14aea8569b75fabe62120f93230