diff options
| -rw-r--r-- | .github/workflows/build.yml | 20 | ||||
| -rw-r--r-- | rtic-macros/CHANGELOG.md | 2 | ||||
| -rw-r--r-- | xtask/src/argument_parsing.rs | 9 |
3 files changed, 8 insertions, 23 deletions
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 8364683..94fbd3f 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -155,7 +155,7 @@ jobs: matrix: backend: - riscv32-imc-clint - - riscv32-imac-clint + - riscv32-imc-mecall toolchain: - stable steps: @@ -168,18 +168,12 @@ jobs: - name: Configure Rust target run: | - rustup target add riscv32imac-unknown-none-elf rustup target add riscv32imc-unknown-none-elf - name: Cache Dependencies uses: Swatinem/rust-cache@v2 - name: Check the examples - if: ${{ matrix.backend == 'riscv32-imc-clint' }} - run: cargo xtask --platform hifive1 --backend ${{ matrix.backend }} --exampleexclude static example-check - - - name: Check the examples - if: ${{ matrix.backend != 'riscv32-imc-clint' }} run: cargo xtask --platform hifive1 --backend ${{ matrix.backend }} example-check # Platform esp32c3: verify all examples, checks @@ -341,7 +335,7 @@ jobs: matrix: backend: - riscv32-imc-clint - - riscv32-imac-clint + - riscv32-imc-mecall toolchain: - stable steps: @@ -355,7 +349,6 @@ jobs: - name: Configure Rust target run: | - rustup target add riscv32imac-unknown-none-elf rustup target add riscv32imc-unknown-none-elf - name: Add Rust component llvm-tools-preview @@ -389,11 +382,6 @@ jobs: which qemu-system-riscv32 - name: Run-pass tests - if: ${{ matrix.backend == 'riscv32-imc-clint' }} - run: cargo xtask --deny-warnings --platform hifive1 --backend ${{ matrix.backend }} --exampleexclude static qemu - - - name: Run-pass tests - if: ${{ matrix.backend != 'riscv32-imc-clint' }} run: cargo xtask --deny-warnings --platform hifive1 --backend ${{ matrix.backend }} qemu # Platform esp32c3: verify the example output with run-pass tests @@ -897,9 +885,9 @@ jobs: needs: - formatcheck - checklm3s6965 - # checkhifive1 TODO + # - checkhifive1 # TODO - clippylm3s6965 - # clippyhifive1 TODO + # - clippyhifive1 # TODO - checkexampleslm3s6965 - checkexampleshifive1 - checkexamplesesp32c3 diff --git a/rtic-macros/CHANGELOG.md b/rtic-macros/CHANGELOG.md index 86b051b..7f5cd80 100644 --- a/rtic-macros/CHANGELOG.md +++ b/rtic-macros/CHANGELOG.md @@ -7,6 +7,8 @@ For each category, *Added*, *Changed*, *Fixed* add new entries at the top! ## [Unreleased] +- Adapt `slic` backends to new version with `mecall` + ## [v2.1.1] - 2024-12-06 ### Changed diff --git a/xtask/src/argument_parsing.rs b/xtask/src/argument_parsing.rs index f50e285..13ae6df 100644 --- a/xtask/src/argument_parsing.rs +++ b/xtask/src/argument_parsing.rs @@ -252,12 +252,7 @@ impl Platforms { let c = "-C".to_string(); match self { Platforms::Esp32C3 => vec![c, "link-arg=-Tlinkall.x".to_string()], - Platforms::Hifive1 => vec![ - c.clone(), - "link-arg=-Thifive1-link.x".to_string(), - c, - "portable_atomic_target_feature=\"zaamo\"".to_string(), - ], + Platforms::Hifive1 => vec![c, "link-arg=-Thifive1-link.x".to_string()], Platforms::Lm3s6965 => vec![c, "link-arg=-Tlink.x".to_string()], Platforms::Nrf52840 => vec![ c.clone(), @@ -315,7 +310,7 @@ impl Platforms { _ => Err(()), }, Platforms::Hifive1 => match backend.to_target() { - RISCV32IMC | RISCV32IMAC => Ok(None), + RISCV32IMC => Ok(None), _ => Err(()), }, Platforms::Lm3s6965 => match backend.to_target() { |