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2022-07-27Merge #652bors[bot]
652: Remove use of basepri register on thumbv8m.base r=AfoHT a=neonquill The basepri register appears to be aviable on thumbv8m.main but not thumbv8m.base. At the very least, attempting to compile against a Cortex-M23 based Microchip ATSAML10E16A generates an error: ``` error[E0432]: unresolved import `cortex_m::register::basepri` --> /Users/dwatson/.cargo/registry/src/github.com-1ecc6299db9ec823/cortex-m-rtic-1.1.3/src/export.rs:25:5 | 25 | use cortex_m::register::basepri; | ^^^^^^^^^^^^^^^^^^^^^^^^^^^ no `basepri` in `register` ``` I wasn't sure if it made more sense to replace the `armv7m` config flag with something related to basepri availability or to get closer to matching the cortex-m use of several architecture specific flags. In the end i chose to make the minimal change possible and just narrowed the existing `thumbv8m` check. Context: [cortex-m:src/register/mod.rs](https://github.com/rust-embedded/cortex-m/blob/4e908625204a1e95dd3fd5bdcd8d66d6bc11c3bc/src/register/mod.rs#L33): ``` #[cfg(all(not(armv6m), not(armv8m_base)))] pub mod basepri; ``` [cortex-m:build.rs](https://github.com/rust-embedded/cortex-m/blob/4e908625204a1e95dd3fd5bdcd8d66d6bc11c3bc/build.rs#L21): ``` } else if target.starts_with("thumbv8m.base") { println!("cargo:rustc-cfg=cortex_m"); println!("cargo:rustc-cfg=armv8m"); println!("cargo:rustc-cfg=armv8m_base"); ``` Co-authored-by: David Watson <david@neonquill.com>
2022-07-27Remove use of basepri register on thumbv8m.baseDavid Watson
The basepri register appears to be aviable on thumbv8m.main but not thumbv8m.base. At the very least, attempting to compile against a Cortex-M23 based Microchip ATSAML10E16A generates an error: ``` error[E0432]: unresolved import `cortex_m::register::basepri` --> /Users/dwatson/.cargo/registry/src/github.com-1ecc6299db9ec823/cortex-m-rtic-1.1.3/src/export.rs:25:5 | 25 | use cortex_m::register::basepri; | ^^^^^^^^^^^^^^^^^^^^^^^^^^^ no `basepri` in `register` ``` This is an attempt to account for the fact that thumbv8m.base (M23) MCUs don't have the BASEPRI register but have more than 32 interrupts. This moves away from the architecture specific config flags and switches to a more functional flag. Make the mask size depend on the max interrupt id Rather than assuming a fixed interrupt count of 32 this code uses an array of u32 bitmasks to calculate the priority mask. The size of this array is calculated at compile time based on the size of the largest interrupt id being used in the target code. For thumbv6m this should be equivalent to the previous version that used a single u32 mask. For thumbv8m.base it will be larger depending on the interrupts used. Don't write 0s to the ISER and ICER registers Writing 0s to these registers is a no-op. Since these masks should be calculated at compile time, this conditional should result in writes being optimized out of the code. Prevent panic on non-arm targets Panicking on unknown targets was breaking things like the doc build on linux. This change should only panic when building on unknown arm targets.
2022-07-27Update CHANGELOG.mdGabriel Górski
2022-06-23Release RTIC v1.1.3Henrik Tjäder
2022-06-23Bump rtic-syntax to v1.0.2 and fix ChangelogHenrik Tjäder
2022-05-09Prepare v1.1.2Emil Fresk
2022-04-20Masks take 3Emil Fresk
2022-04-13Fixed `macro` versionEmil Fresk
2022-04-13Release RTIC v1.1Henrik Tjäder
Bump versions, including using using latest rtic-syntax
2022-03-02Added support for SRP based scheduling for armv6mPer Lindgren
2022-03-01Merge #620bors[bot]
620: Add CHANGELOG instructions and fix incorrectly placed item r=korken89 a=AfoHT Co-authored-by: Henrik Tjäder <henrik@grepit.se>
2022-02-22Add CHANGELOG instructions and fix incorrectly placed itemHenrik Tjäder
2022-02-22Clippy with pedantic suggestionsHenrik Tjäder
2022-02-22Merge #616bors[bot]
616: rtic::mutex::prelude::* fixes glob import lint r=korken89 a=AfoHT Running cargo Clippy with pedantic rules denied ``` cargo clippy -- --deny clippy::pedantic ``` it will complain: ``` error: usage of wildcard import | 16 | use rtic::mutex_prelude::*; | ^^^^^^^^^^^^^^^^^^^^^^ help: try: `rtic::mutex_prelude::{Mutex, TupleExt01, TupleExt02, TupleExt03, TupleExt04, TupleExt05, TupleExt06, TupleExt07, TupleExt08, TupleExt09, TupleExt10, TupleExt11, TupleExt12, TupleExt13, TupleExt14, TupleExt15, TupleExt16, TupleExt17, TupleExt18, TupleExt19, TupleExt20, TupleExt21, TupleExt22, TupleExt23, TupleExt24, TupleExt25, TupleExt26, TupleExt27, TupleExt28, TupleExt29, TupleExt30, TupleExt31, TupleExt32}` | = note: `-D clippy::wildcard-imports` implied by `-D clippy::pedantic` = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#wildcard_imports error: could not compile --- due to previous error Error: command `cargo clippy -- --deny clippy::all --deny clippy::pedantic` failed, exit status: 101 ``` Looking at the Clippy [wildcard-imports rule](https://rust-lang.github.io/rust-clippy/master/#wildcard_imports) the exception is for wildcards on modules named prelude. Thus, `prelude::*` is OK. Current state: `use rtic-core::prelude as mutex_prelude` almost fits the bill, but `mutex_prelude != prelude`. As this was part of user facing API I don’t think we can remove the current setup, so rtic-core `Mutex`, `Exclusive` and multi-lock `TupleExt0X` retained in old location to be backwards compatible. Co-authored-by: Henrik Tjäder <henrik@grepit.se>
2022-02-18rtic::mutex::prelude::* fixes glob import lintHenrik Tjäder
rtic-core Mutex, Exclusive and multi-lock retained in old location to not be backwards breaking
2022-02-15Merge #608bors[bot]
608: Debug bors r=perlindgren a=AfoHT Co-authored-by: Henrik Tjäder <henrik@grepit.se>
2022-02-15Create tiny changeHenrik Tjäder
2022-02-15action-rs tool-cache is deprecated, always failingHenrik Tjäder
2022-02-15CHANGELOG merge=unionHenrik Tjäder
2022-02-10Docs: Fix dated migration docs for spawnHenrik Tjäder
2022-02-10Update CHANGELOGHenrik Tjäder
2022-02-10Update CHANGELOGHenrik Tjäder
2022-02-09docs: make mdBook emit error codesHenrik Tjäder
2022-02-08book: Restore accidentally removed filesHenrik Tjäder
2022-02-05Merge #593bors[bot]
593: RTIC macro expansion: Try to find target-dir r=korken89 a=AfoHT Seems over-engineered, but for projects where ``` [build] target-dir = "target" ``` is set to anything other than default `target` RTIC did simply not produce any `rtic-expansion.rs`. This changes the approach to not giving up if not finding `target/` by looking at `OUT_DIR` and traversing back until `TARGET` is found. As the `TARGET` target-triple variable is not available, approximate the `TARGET` folder (found in `target-dir`) with `s.starts_with("thumbv")`. `target-dir` as set in `.cargo/config` will now be the parent directory of the `Path` ending with `TARGET` ## Example running with default target: ``` cortex-m-rtic on  expansionoutdir [$!?] is 📦 v1.0.0 via R v1.58.0 took 4s ❯ cargo build --example spawn --target thumbv7em-none-eabihf OUT_DIR "/home/henrik/rust/rtic/cortex-m-rtic/target/thumbv7em-none-eabihf/debug/build/cortex-m-rtic-5bd81e8412a790d5/out" target/ exists Write file: target/rtic-expansion.rs Finished dev [unoptimized + debuginfo] target(s) in 7.20s ``` ## Contrived example With `.cargo/config` containing: ``` [build] target-dir = "/tmp/cargothingy/../rust/./target/cargo"` ``` ``` cortex-m-rtic on  expansionoutdir [$!?] is 📦 v1.0.0 via R v1.58.0 took 3s ❯ cargo build --example spawn --target thumbv7em-none-eabihf OUT_DIR "/tmp/cargothingy/../rust/./target/cargo/thumbv7em-none-eabihf/debug/build/cortex-m-rtic-5bd81e8412a790d5/out" "/tmp/cargothingy/../rust/./target/cargo" Write file: /tmp/cargothingy/../rust/./target/cargo/rtic-expansion.rs Finished dev [unoptimized + debuginfo] target(s) in 6.42s ``` ## Less extreme with relative paths ``` [build] target-dir = "../../cargothingy/target/buildfiles/and-stuff" ``` ``` OUT_DIR "/home/henrik/rust/rtic/cortex-m-rtic/../../cargothingy/target/buildfiles/and-stuff/thumbv7em-none-eabihf/debug/build/cortex-m-rtic-5bd81e8412a790d5/out" "/home/henrik/rust/rtic/cortex-m-rtic/../../cargothingy/target/buildfiles/and-stuff" Write file: /home/henrik/rust/rtic/cortex-m-rtic/../../cargothingy/target/buildfiles/and-stuff/rtic-expansion.rs Finished dev [unoptimized + debuginfo] target(s) in 6.78s ``` Note: If the user creates a folder named target in the same directory where `Cargo.toml`/crate root is, that will be used for storing the expansion. ``` <...> OUT_DIR "/home/henrik/rust/rtic/cortex-m-rtic/../../cargothingy/target/buildfiles/and-stuff/thumbv7em-none-eabihf/debug/build/cortex-m-rtic-5bd81e8412a790d5/out" target/ exists Write file: target/rtic-expansion.rs Finished dev [unoptimized + debuginfo] target(s) in 6.62s ``` Co-authored-by: Henrik Tjäder <henrik@grepit.se>
2022-02-04add changelog entryRobert Jördens
2022-01-28RTIC macro expansion: Try to find target-dirHenrik Tjäder
2022-01-04Drift free timing examplesPer Lindgren
2022-01-03Added changelog enforcerEmil Fresk
2021-12-25Bump version to 1.0.0Henrik Tjäder
2021-12-14Update changelogHenrik Tjäder
2021-11-09Update versions and changelogEmil Fresk
2021-11-08CHANGELOG: Add links to v0.6.xHenrik Tjäder
2021-11-08Update changelog from v0.5.x branchHenrik Tjäder
2021-11-08Update CHANGELOGHenrik Tjäder
2021-09-28Prepare rc.2 releaseEmil Fresk
2021-09-27Preparing 0.6.0-rc.1Emil Fresk
2021-07-09Update changelog and versionEmil Fresk
2021-05-28Fixed changelogEmil Fresk
2021-05-27Prepare release alpha.4Emil Fresk
2021-04-080.6.0-alpha.2 releaseEmil Fresk
2020-11-14Updated changelog, use released version of rtic-coreEmil Fresk
2020-11-14Update the ChangelogHenrik Tjäder
2020-10-29extern taskPer Lindgren
2020-10-23Updating the changelogHenrik Tjäder
2020-10-23move dispatchers to app argumentPer Lindgren
2020-08-27Preparing v0.5.5 releaseEmil Fresk
2020-08-26Preparing for 0.5.4 releaseEmil Fresk
2020-06-12Updated CHANGELOGEmil Fresk
2020-06-12Preparing for v0.5.3Emil Fresk
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