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2023-03-01executor update for less unsafe and more clearPer Lindgren
2023-03-01More work on new spawn/executorEmil Fresk
2023-03-01New executor designEmil Fresk
2023-03-01Start CI, disable docs buildingEmil Fresk
2023-03-01Clippy fixesEmil Fresk
2023-03-01Fix locks, basepri writeback errorEmil Fresk
2023-03-01export Cell removed, expmples updatedPer Lindgren
2023-03-01Removed Priority, simplified lifetime handlingEmil Fresk
2023-03-01More removalEmil Fresk
2023-03-01Even more cleanupEmil Fresk
2023-03-01Old xtask test passEmil Fresk
2023-03-01RTIC v2: Initial commitEmil Fresk
rtic-syntax is now part of RTIC repository
2022-07-27Remove use of basepri register on thumbv8m.baseDavid Watson
The basepri register appears to be aviable on thumbv8m.main but not thumbv8m.base. At the very least, attempting to compile against a Cortex-M23 based Microchip ATSAML10E16A generates an error: ``` error[E0432]: unresolved import `cortex_m::register::basepri` --> /Users/dwatson/.cargo/registry/src/github.com-1ecc6299db9ec823/cortex-m-rtic-1.1.3/src/export.rs:25:5 | 25 | use cortex_m::register::basepri; | ^^^^^^^^^^^^^^^^^^^^^^^^^^^ no `basepri` in `register` ``` This is an attempt to account for the fact that thumbv8m.base (M23) MCUs don't have the BASEPRI register but have more than 32 interrupts. This moves away from the architecture specific config flags and switches to a more functional flag. Make the mask size depend on the max interrupt id Rather than assuming a fixed interrupt count of 32 this code uses an array of u32 bitmasks to calculate the priority mask. The size of this array is calculated at compile time based on the size of the largest interrupt id being used in the target code. For thumbv6m this should be equivalent to the previous version that used a single u32 mask. For thumbv8m.base it will be larger depending on the interrupts used. Don't write 0s to the ISER and ICER registers Writing 0s to these registers is a no-op. Since these masks should be calculated at compile time, this conditional should result in writes being optimized out of the code. Prevent panic on non-arm targets Panicking on unknown targets was breaking things like the doc build on linux. This change should only panic when building on unknown arm targets.
2022-06-07fix ci: use SYST::PTRJorge Aparicio
SYST::ptr has been deprecated in cortex-m v0.7.5 SYST::PTR is available since cortex-m v0.7.0
2022-05-24Fix clash with defmtEmil Fresk
2022-04-20Added check for resource usage and to generate an compile error for thumbv6 ↵Emil Fresk
exceptions
2022-04-20Masks take 3Emil Fresk
2022-03-02Added support for SRP based scheduling for armv6mPer Lindgren
2022-02-22Clippy with pedantic suggestionsHenrik Tjäder
2022-02-20Provide Mutex relative to prelude to fix doc linking issues coming from ↵Henrik Tjäder
rtic-core
2022-02-18rtic::mutex::prelude::* fixes glob import lintHenrik Tjäder
rtic-core Mutex, Exclusive and multi-lock retained in old location to not be backwards breaking
2022-02-09Fix/mute clippy errorsHenrik Tjäder
2021-12-25Docfix: MSRV and Semantic VersioningPer Lindgren
2021-12-25Docfix: remove pre-release notePer Lindgren
2021-12-25Merge #565 #566bors[bot]
565: Edition: Bump to 2021 r=korken89 a=AfoHT 566: v1.0.0 r=korken89 a=AfoHT This should fail building until all deps are released and accessible on crates.io (There are some required PRs for edition2021 for each repo, alternatively just bringing in the v1.0 PR should have commits included, we can drop the extra PRs later on) https://github.com/rtic-rs/rtic-monotonic/pull/6 https://github.com/rtic-rs/rtic-core/pull/22 https://github.com/rtic-rs/rtic-syntax/pull/68 Co-authored-by: Henrik Tjäder <henrik@grepit.se>
2021-12-25Clippy lintsHenrik Tjäder
2021-12-25Edition: Bump to 2021Henrik Tjäder
2021-12-14Idle: Switch to NOP instead of WFIHenrik Tjäder
Add example how to get old WFI behaviour
2021-11-25Remove #[deny(warnings)], but deny warnings for CIHenrik Tjäder
2021-11-25Docs: add RTIC logoHenrik Tjäder
2021-11-09New monotonic trait workingEmil Fresk
2021-11-02added doc for RacyCellPer Lindgren
2021-11-02Fixed aliasing issue due to RacyCell implementationEmil Fresk
2021-09-28Fix export of SYSTEmil Fresk
2021-09-27Fix a bug in the timer queue due to comparison bug in embedded-timeEmil Fresk
2021-09-14Cleanup export and actually use rtic::export, made fn init inlineEmil Fresk
2021-08-16Remove linked list impl - use heapless, linked list init now const fnEmil Fresk
2021-07-09const genericsAndrey Zgarbul
2021-06-06assert emptyJames Hillyerd
2021-06-06Allow zero sized LinkedListJames Hillyerd
2021-04-08Goodbye static mutEmil Fresk
2021-04-08Fixed UB in `spawn_at`Emil Fresk
2021-03-22Updated schedule example with all combinationsEmil Fresk
2021-03-20Cancel and reschedule workingEmil Fresk
Support cfgs in the imports Account for extern tasks
2021-03-13Added interface for cancel/rescheduleEmil Fresk
Use wrapping add for marker No need to store handle to queue Remove unnecessary `SpawnHandle::new` Fix test Updated interface to follow proposal
2021-02-25Review fixesEmil Fresk
2021-02-22Updated to new interfaceEmil Fresk
2021-02-22Added enable/disable timer callsEmil Fresk
2021-02-22Of by 1Emil Fresk
2021-02-18Now with new monotonic trait and crateEmil Fresk
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