From 8c23e178f3838bcdd13662a2ffefd39ec144e869 Mon Sep 17 00:00:00 2001 From: Finomnis Date: Thu, 11 Apr 2024 00:00:38 +0200 Subject: Monotonic rewrite (#874) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * Rework timer_queue and monotonic architecture Goals: * make Monotonic purely internal * make Monotonic purely tick passed, no fugit involved * create a wrapper struct in the user's code via a macro that then converts the "now" from the tick based monotonic to a fugit based timestamp We need to proxy the delay functions of the timer queue anyway, so we could simply perform the conversion in those proxy functions. * Update cargo.lock * Update readme of rtic-time * CI: ESP32: Redact esp_image: Too volatile * Fixup: Changelog double entry rebase mistake --------- Co-authored-by: Henrik Tjäder --- .../stm32g030f6_periodic_prints/.cargo/config.toml | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 examples/stm32g030f6_periodic_prints/.cargo/config.toml (limited to 'examples/stm32g030f6_periodic_prints/.cargo') diff --git a/examples/stm32g030f6_periodic_prints/.cargo/config.toml b/examples/stm32g030f6_periodic_prints/.cargo/config.toml new file mode 100644 index 0000000..15ddd2a --- /dev/null +++ b/examples/stm32g030f6_periodic_prints/.cargo/config.toml @@ -0,0 +1,24 @@ +[target.'cfg(all(target_arch = "arm", target_os = "none"))'] +# TODO(2) replace `$CHIP` with your chip's name (see `probe-run --list-chips` output) +runner = "probe-run --chip STM32G030F6Px" +rustflags = [ + "-C", "linker=flip-link", + "-C", "link-arg=-Tlink.x", + "-C", "link-arg=-Tdefmt.x", + # This is needed if your flash or ram addresses are not aligned to 0x10000 in memory.x + # See https://github.com/rust-embedded/cortex-m-quickstart/pull/95 + "-C", "link-arg=--nmagic", +] + +[build] +# TODO(3) Adjust the compilation target. +# (`thumbv6m-*` is compatible with all ARM Cortex-M chips but using the right +# target improves performance) +target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+ +# target = "thumbv7m-none-eabi" # Cortex-M3 +# target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU) +# target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) + +[alias] +rb = "run --bin" +rrb = "run --release --bin" -- cgit v1.2.3