From 4060c3def88f82d4e4f48de7137ce365167ef265 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rom=C3=A1n=20C=C3=A1rdenas=20Rodr=C3=ADguez?=
 <rcardenas.rod@gmail.com>
Date: Wed, 20 Mar 2024 21:06:47 +0100
Subject: RISC-V support over CLINT (#815)
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* Rebase to master

* using interrupt_mod

* bug fixes

* fix other backends

* Add changelog

* forgot about rtic-macros

* backend-specific configuration

* core peripherals optional over macro argument

* pre_init_preprocessing binding

* CI for RISC-V (WIP)

* separation of concerns

* add targets for RISC-V examples

* remove qemu feature

* prepare examples folder

* move examples all together

* move ci out of examples

* minor changes

* add cortex-m

* new xtask: proof of concept

* fix build.yml

* feature typo

* clean rtic examples

* reproduce weird issue

* remove unsafe code in user app

* update dependencies

* allow builds on riscv32imc

* let's fix QEMU

* Update .github/workflows/build.yml

Co-authored-by: Henrik Tjäder <henrik@tjaders.com>

* New build.rs

* removing test features

* adapt ui test to new version of clippy

* add more examples to RISC-V backend

* proper configuration of heapless for riscv32imc

* opt-out examples for riscv32imc

* point to new version of riscv-slic

* adapt new macro bindings

* adapt examples and CI to stable

* fix cortex-m CI

* Review

---------

Co-authored-by: Henrik Tjäder <henrik@tjaders.com>
---
 rtic-macros/src/codegen/module.rs | 29 +++++++++++++++++------------
 1 file changed, 17 insertions(+), 12 deletions(-)

(limited to 'rtic-macros/src/codegen/module.rs')

diff --git a/rtic-macros/src/codegen/module.rs b/rtic-macros/src/codegen/module.rs
index c8afe07..17c8ce7 100644
--- a/rtic-macros/src/codegen/module.rs
+++ b/rtic-macros/src/codegen/module.rs
@@ -1,5 +1,5 @@
 use crate::syntax::{ast::App, Context};
-use crate::{analyze::Analysis, codegen::util};
+use crate::{analyze::Analysis, codegen::bindings::interrupt_mod, codegen::util};
 use proc_macro2::TokenStream as TokenStream2;
 use quote::quote;
 
@@ -16,16 +16,20 @@ pub fn codegen(ctxt: Context, app: &App, analysis: &Analysis) -> TokenStream2 {
 
     match ctxt {
         Context::Init => {
-            fields.push(quote!(
-                /// Core peripherals
-                pub core: rtic::export::Peripherals
-            ));
-
             fields.push(quote!(
                 /// The space used to allocate async executors in bytes.
                 pub executors_size: usize
             ));
 
+            if app.args.core {
+                fields.push(quote!(
+                    /// Core peripherals
+                    pub core: rtic::export::Peripherals
+                ));
+
+                values.push(quote!(core: core));
+            }
+
             if app.args.peripherals {
                 let device = &app.args.device;
 
@@ -43,8 +47,6 @@ pub fn codegen(ctxt: Context, app: &App, analysis: &Analysis) -> TokenStream2 {
             ));
 
             values.push(quote!(cs: rtic::export::CriticalSection::new()));
-
-            values.push(quote!(core));
             values.push(quote!(executors_size));
         }
 
@@ -98,7 +100,11 @@ pub fn codegen(ctxt: Context, app: &App, analysis: &Analysis) -> TokenStream2 {
     };
 
     let core = if ctxt.is_init() {
-        Some(quote!(core: rtic::export::Peripherals, executors_size: usize))
+        if app.args.core {
+            Some(quote!(core: rtic::export::Peripherals, executors_size: usize))
+        } else {
+            Some(quote!(executors_size: usize))
+        }
     } else {
         None
     };
@@ -144,10 +150,9 @@ pub fn codegen(ctxt: Context, app: &App, analysis: &Analysis) -> TokenStream2 {
         task_cfgs = cfgs.clone();
 
         let pend_interrupt = if priority > 0 {
-            let device = &app.args.device;
-            let enum_ = util::interrupt_ident();
+            let int_mod = interrupt_mod(app);
             let interrupt = &analysis.interrupts.get(&priority).expect("UREACHABLE").0;
-            quote!(rtic::export::pend(#device::#enum_::#interrupt);)
+            quote!(rtic::export::pend(#int_mod::#interrupt);)
         } else {
             quote!()
         };
-- 
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