From 1f6b6a42e5d581300dc3f72ebe489ea1380fe0ef Mon Sep 17 00:00:00 2001 From: Jesse Braham Date: Wed, 16 Oct 2024 12:29:51 -0700 Subject: Update support/example for ESP32-C3 to use latest versions of dependencies (#975) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * Update `rtic` package to use latest version of `esp32c3` dependency * Update `rtic-macros` ESP32-C3 bindings to reflect changes in HAL * Update the ESP32-C3 examples to use latest versions of all dependencies * Update changelogs * adjust expected qemu output, add compile-time checks * remove runtime checks, this is checked at compile time * fix expected qemu output * Clean up interrupt enable code a bit * Update `rtic-monotonic` to use the latest PAC for ESP32-C3 * Update `CHANGELOG.md` for `rtic-monotonic` * ci: esp32c3: Format runner.sh * ci: esp32c3: Default to silent boot export DEBUGGING while running to get verbose boot env DEBUGGING=1 cargo xtask ... * ci: esp32c3: Update expected example output --------- Co-authored-by: onsdagens Co-authored-by: Henrik Tjäder --- rtic-macros/src/codegen/bindings/esp32c3.rs | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'rtic-macros/src') diff --git a/rtic-macros/src/codegen/bindings/esp32c3.rs b/rtic-macros/src/codegen/bindings/esp32c3.rs index 254b0f5..4caaa35 100644 --- a/rtic-macros/src/codegen/bindings/esp32c3.rs +++ b/rtic-macros/src/codegen/bindings/esp32c3.rs @@ -80,11 +80,13 @@ mod esp32c3 { } stmts } + pub fn pre_init_enable_interrupts(app: &App, analysis: &CodegenAnalysis) -> Vec { let mut stmts = vec![]; - let mut curr_cpu_id: u8 = 1; //cpu interrupt id 0 is reserved + let mut curr_cpu_id: u8 = 16; // cpu interrupt ids 0-15 are reserved let rt_err = util::rt_err_ident(); let max_prio: usize = 15; //unfortunately this is not part of pac, but we know that max prio is 15. + let min_prio: usize = 1; let interrupt_ids = analysis.interrupts.iter().map(|(p, (id, _))| (p, id)); // Unmask interrupts and set their priorities for (&priority, name) in interrupt_ids.chain( @@ -95,9 +97,11 @@ mod esp32c3 { let es = format!( "Maximum priority used by interrupt vector '{name}' is more than supported by hardware" ); + let es_zero = format!("Priority {priority} used by interrupt vector '{name}' is less than supported by hardware"); // Compile time assert that this priority is supported by the device stmts.push(quote!( const _: () = if (#max_prio) <= #priority as usize { ::core::panic!(#es); }; + const _: () = if (#min_prio) > #priority as usize { ::core::panic!(#es_zero);}; )); stmts.push(quote!( rtic::export::enable( @@ -218,14 +222,14 @@ mod esp32c3 { static RTIC_ASYNC_MAX_LOGICAL_PRIO: u8 = #max; )] } + pub fn handler_config( app: &App, analysis: &CodegenAnalysis, dispatcher_name: Ident, ) -> Vec { let mut stmts = vec![]; - let mut curr_cpu_id = 1; - //let mut ret = ""; + let mut curr_cpu_id = 16; // cpu interrupt ids 0-15 are reserved let interrupt_ids = analysis.interrupts.iter().map(|(p, (id, _))| (p, id)); for (_, name) in interrupt_ids.chain( app.hardware_tasks @@ -233,7 +237,7 @@ mod esp32c3 { .filter_map(|task| Some((&task.args.priority, &task.args.binds))), ) { if *name == dispatcher_name { - let ret = &("cpu_int_".to_owned() + &curr_cpu_id.to_string() + "_handler"); + let ret = &("interrupt".to_owned() + &curr_cpu_id.to_string()); stmts.push(quote!(#[export_name = #ret])); } curr_cpu_id += 1; -- cgit v1.2.3