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| author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2021-08-12 20:24:20 +0200 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2021-08-13 07:39:41 +0000 |
| commit | 306890f884815835f90bf7099242b450a92d3600 (patch) | |
| tree | c561d9c41e32ea41799a3b4b8d46c150bd47c7f3 /.github/workflows | |
| parent | 84ffc81e80a337111f8fab63b50159e86d6a8e85 (diff) | |
nexys3ddr: Fix I/O voltage for SW8 and SW9
As can be seen in the schematics for the Nexys4DDR board, the switches
SW8 and SW9 are connected to the 1.8V rail, rather than 3.3V.
Diffstat (limited to '.github/workflows')
0 files changed, 0 insertions, 0 deletions