Update iCE40 GLOBAL and PULLUP attribute to use correct types.

7 files changed, 12 insertions, 12 deletions

diff --git a/nmigen_boards/blackice.py b/nmigen_boards/blackice.py
index 51d09e4..2bdb3d9 100644
--- a/nmigen_boards/blackice.py
+++ b/nmigen_boards/blackice.py
@@ -15,7 +15,7 @@ class BlackIcePlatform(LatticeICE40Platform):
     default_clk = "clk100"
     resources   = [
         Resource("clk100", 0, Pins("129", dir="i"),
-            Clock(100e6), Attrs(GLOBAL="1", IO_STANDARD="SB_LVCMOS33")
+            Clock(100e6), Attrs(GLOBAL=True, IO_STANDARD="SB_LVCMOS33")
         ),
 
         Resource("user_led", 0, Pins("71", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
@@ -38,7 +38,7 @@ class BlackIcePlatform(LatticeICE40Platform):
 
         UARTResource(0,
             rx="88", tx="85", rts="91", cts="94",
-            attrs=Attrs(IO_STANDARD="SB_LVCMOS33", PULLUP="1")
+            attrs=Attrs(IO_STANDARD="SB_LVCMOS33", PULLUP=1)
         ),
 
         SRAMResource(0,
diff --git a/nmigen_boards/blackice_ii.py b/nmigen_boards/blackice_ii.py
index 040a8f8..0d2f534 100644
--- a/nmigen_boards/blackice_ii.py
+++ b/nmigen_boards/blackice_ii.py
@@ -15,7 +15,7 @@ class BlackIceIIPlatform(LatticeICE40Platform):
     default_clk = "clk100"
     resources   = [
         Resource("clk100", 0, Pins("129", dir="i"),
-            Clock(100e6), Attrs(GLOBAL="1", IO_STANDARD="SB_LVCMOS33")
+            Clock(100e6), Attrs(GLOBAL=True, IO_STANDARD="SB_LVCMOS33")
         ),
 
         Resource("user_led", 0, Pins("71", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
@@ -38,7 +38,7 @@ class BlackIceIIPlatform(LatticeICE40Platform):
 
         UARTResource(0,
             rx="88", tx="85", rts="91", cts="94",
-            attrs=Attrs(IO_STANDARD="SB_LVCMOS33", PULLUP="1")
+            attrs=Attrs(IO_STANDARD="SB_LVCMOS33", PULLUP=1)
         ),
 
         SRAMResource(0,
diff --git a/nmigen_boards/fomu_hacker.py b/nmigen_boards/fomu_hacker.py
index 905262d..34c6b80 100644
--- a/nmigen_boards/fomu_hacker.py
+++ b/nmigen_boards/fomu_hacker.py
@@ -15,7 +15,7 @@ class FomuHackerPlatform(LatticeICE40Platform):
     default_clk = "clk48"
     resources   = [
         Resource("clk48", 0, Pins("F5", dir="i"),
-                 Clock(48e6), Attrs(GLOBAL="1", IO_STANDARD="SB_LVCMOS33")),
+                 Clock(48e6), Attrs(GLOBAL=True, IO_STANDARD="SB_LVCMOS33")),
 
         Resource("user_led", 0, PinsN("A5", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
         Resource("rgb_led", 0,
diff --git a/nmigen_boards/ice40_hx1k_blink_evn.py b/nmigen_boards/ice40_hx1k_blink_evn.py
index a3233b9..1504b15 100644
--- a/nmigen_boards/ice40_hx1k_blink_evn.py
+++ b/nmigen_boards/ice40_hx1k_blink_evn.py
@@ -15,7 +15,7 @@ class ICE40HX1KBlinkEVNPlatform(LatticeICE40Platform):
     default_clk = "clk3p3"
     resources   = [
         Resource("clk3p3", 0, Pins("13", dir="i"), Clock(3.3e6),
-                 Attrs(GLOBAL="1", IO_STANDARD="SB_LVCMOS33")),
+                 Attrs(GLOBAL=True, IO_STANDARD="SB_LVCMOS33")),
 
         Resource("user_led", 0, Pins("59", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
         Resource("user_led", 1, Pins("56", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
diff --git a/nmigen_boards/ice40_hx8k_b_evn.py b/nmigen_boards/ice40_hx8k_b_evn.py
index cf0c8a5..bca53d0 100644
--- a/nmigen_boards/ice40_hx8k_b_evn.py
+++ b/nmigen_boards/ice40_hx8k_b_evn.py
@@ -15,7 +15,7 @@ class ICE40HX8KBEVNPlatform(LatticeICE40Platform):
     default_clk = "clk12"
     resources   = [
         Resource("clk12", 0, Pins("J3", dir="i"),
-                 Clock(12e6), Attrs(GLOBAL="1", IO_STANDARD="SB_LVCMOS33")),
+                 Clock(12e6), Attrs(GLOBAL=True, IO_STANDARD="SB_LVCMOS33")),
 
         Resource("user_led", 0, Pins("C3", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")), # D2
         Resource("user_led", 1, Pins("B3", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")), # D3
@@ -28,7 +28,7 @@ class ICE40HX8KBEVNPlatform(LatticeICE40Platform):
 
         UARTResource(0,
             rx="B10", tx="B12", rts="B13", cts="A15", dtr="A16", dsr="B14", dcd="B15",
-            attrs=Attrs(IO_STANDARD="SB_LVCMOS33", PULLUP="1")
+            attrs=Attrs(IO_STANDARD="SB_LVCMOS33", PULLUP=1)
         ),
 
         *SPIFlashResources(0,
diff --git a/nmigen_boards/icebreaker.py b/nmigen_boards/icebreaker.py
index 755a521..9dfd950 100644
--- a/nmigen_boards/icebreaker.py
+++ b/nmigen_boards/icebreaker.py
@@ -15,7 +15,7 @@ class ICEBreakerPlatform(LatticeICE40Platform):
     default_clk = "clk12"
     resources   = [
         Resource("clk12", 0, Pins("35", dir="i"),
-                 Clock(12e6), Attrs(GLOBAL="1", IO_STANDARD="SB_LVCMOS33")),
+                 Clock(12e6), Attrs(GLOBAL=True, IO_STANDARD="SB_LVCMOS33")),
 
         Resource("user_led",  0, PinsN("11", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
         Resource("user_led",  1, PinsN("37", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
@@ -27,7 +27,7 @@ class ICEBreakerPlatform(LatticeICE40Platform):
 
         UARTResource(0,
             rx="6", tx="9",
-            attrs=Attrs(IO_STANDARD="SB_LVTTL", PULLUP="1")
+            attrs=Attrs(IO_STANDARD="SB_LVTTL", PULLUP=1)
         ),
 
         *SPIFlashResources(0,
diff --git a/nmigen_boards/icestick.py b/nmigen_boards/icestick.py
index dccf34c..f41006d 100644
--- a/nmigen_boards/icestick.py
+++ b/nmigen_boards/icestick.py
@@ -16,7 +16,7 @@ class ICEStickPlatform(LatticeICE40Platform):
     default_clk = "clk12"
     resources   = [
         Resource("clk12", 0, Pins("21", dir="i"),
-                 Clock(12e6), Attrs(GLOBAL="1", IO_STANDARD="SB_LVCMOS33")),
+                 Clock(12e6), Attrs(GLOBAL=True, IO_STANDARD="SB_LVCMOS33")),
 
         Resource("user_led", 0, Pins("99", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
         Resource("user_led", 1, Pins("98", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")),
@@ -26,7 +26,7 @@ class ICEStickPlatform(LatticeICE40Platform):
 
         UARTResource(0,
             rx="9", tx="8", rts="7", cts="4", dtr="3", dsr="2", dcd="1",
-            attrs=Attrs(IO_STANDARD="SB_LVTTL", PULLUP="1")
+            attrs=Attrs(IO_STANDARD="SB_LVTTL", PULLUP=1)
         ),
 
         IrDAResource(0,