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authorGwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>2023-05-05 17:41:49 +0200
committerCatherine <whitequark@whitequark.org>2023-05-05 18:00:16 +0100
commit130123d28dc0d16faab6a02fd07eea4dbb6d43fb (patch)
tree1f029bbd4c3daec382eb6e11da97ab7a6b219f89 /amaranth_boards/cmod_a7.py
parenta934c56e581c9e5ed8608e9f312a0594a1b32575 (diff)
cmod_a7: toolchain_program: use board name instead of cable + FPGA version
Diffstat (limited to 'amaranth_boards/cmod_a7.py')
-rw-r--r--amaranth_boards/cmod_a7.py3
1 files changed, 1 insertions, 2 deletions
diff --git a/amaranth_boards/cmod_a7.py b/amaranth_boards/cmod_a7.py
index adc11e0..7f62c60 100644
--- a/amaranth_boards/cmod_a7.py
+++ b/amaranth_boards/cmod_a7.py
@@ -77,8 +77,7 @@ class _CmodA7Platform(XilinxPlatform):
def toolchain_program(self, products, name):
with products.extract("{}.bit".format(name)) as bitstream_filename:
subprocess.check_call(["openFPGALoader",
- "-c", "digilent",
- "--fpga-part", "xc7a35",
+ "-b", "cmoda7_35t",
"{}".format(bitstream_filename)
])