diff options
| author | whitequark <whitequark@whitequark.org> | 2021-12-10 07:38:00 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2021-12-10 08:30:37 +0000 |
| commit | b968cfade961a329c26035ef8bfdf3058e95a9f1 (patch) | |
| tree | 94891b950cb0547868877027230ff09b9cb56d4a /amaranth_boards/ebaz4205.py | |
| parent | bd7fdd379d8b28f8b542f251a11ca28297e8fd6f (diff) | |
Rename nMigen to Amaranth HDL.
Diffstat (limited to 'amaranth_boards/ebaz4205.py')
| -rw-r--r-- | amaranth_boards/ebaz4205.py | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/amaranth_boards/ebaz4205.py b/amaranth_boards/ebaz4205.py new file mode 100644 index 0000000..eb4a692 --- /dev/null +++ b/amaranth_boards/ebaz4205.py @@ -0,0 +1,40 @@ +import os +import subprocess + +from amaranth.build import * +from amaranth.vendor.xilinx_7series import * +from .resources import * + + +__all__ = ["EBAZ4205Platform"] + + +class EBAZ4205Platform(Xilinx7SeriesPlatform): + device = "xc7z010" + package = "clg400" + speed = "1" + default_clk = "clk33_333" + resources = [ + Resource("clk33_333", 0, + Pins("N18", dir="i"), Clock(33.333e6), Attrs(IOSTANDARD="LVCMOS33")), + + *LEDResources( + pins="W14 W13", + attrs=Attrs(IOSTANDARD="LVCMOS33")), + + UARTResource(0, + rx="B19", tx="B20", + attrs=Attrs(IOSTANDARD="LVCMOS33")), + ] + connectors = [ + ] + + def toolchain_program(self, products, name, **kwargs): + xc3sprog = os.environ.get("XC3SPROG", "xc3sprog") + with products.extract("{}.bit".format(name)) as bitstream_filename: + subprocess.run([xc3sprog, "-c", "jtaghs1_fast", "-p", "1", bitstream_filename], check=True) + + +if __name__ == "__main__": + from .test.blinky import * + EBAZ4205Platform().build(Blinky(), do_program=True) |
