diff options
| author | whitequark <whitequark@whitequark.org> | 2021-12-10 07:38:00 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2021-12-10 08:30:37 +0000 |
| commit | b968cfade961a329c26035ef8bfdf3058e95a9f1 (patch) | |
| tree | 94891b950cb0547868877027230ff09b9cb56d4a /amaranth_boards/kc705.py | |
| parent | bd7fdd379d8b28f8b542f251a11ca28297e8fd6f (diff) | |
Rename nMigen to Amaranth HDL.
Diffstat (limited to 'amaranth_boards/kc705.py')
| -rw-r--r-- | amaranth_boards/kc705.py | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/amaranth_boards/kc705.py b/amaranth_boards/kc705.py new file mode 100644 index 0000000..d513da2 --- /dev/null +++ b/amaranth_boards/kc705.py @@ -0,0 +1,42 @@ +import os +import subprocess + +from amaranth.build import * +from amaranth.vendor.xilinx_7series import * +from .resources import * + + +__all__ = ["KC705Platform"] + + +class KC705Platform(Xilinx7SeriesPlatform): + device = "xc7k325t" + package = "ffg900" + speed = "2" + default_clk = "clk156" + resources = [ + Resource("clk156", 0, DiffPairs("K28", "K29", dir="i"), + Clock(156e6), Attrs(IOSTANDARD="LVDS_25")), + + *LEDResources(pins="AB8 AA8 AC9 AB9 AE26 G19 E18 F16", + attrs=Attrs(IOSTANDARD="LVCMOS15")), + + UARTResource(0, + rx="M19", tx="K24", + attrs=Attrs(IOSTANDARD="LVCMOS33") + ), + ] + connectors = [] + + def toolchain_program(self, products, name): + openocd = os.environ.get("OPENOCD", "openocd") + with products.extract("{}.bit".format(name)) as bitstream_filename: + subprocess.check_call([openocd, + "-c", "source [find board/kc705.cfg]; init; pld load 0 {}; exit" + .format(bitstream_filename) + ]) + + +if __name__ == "__main__": + from .test.blinky import * + KC705Platform().build(Blinky(), do_program=True) |
