diff options
| author | Catherine <whitequark@whitequark.org> | 2024-02-28 13:03:05 +0000 |
|---|---|---|
| committer | Catherine <whitequark@whitequark.org> | 2024-02-28 14:59:20 +0000 |
| commit | b67996c48f1bc91412605acd7012f242514d3927 (patch) | |
| tree | 849868278ce43c5f26ba370c685c40b2d2e8ff96 /amaranth_boards | |
| parent | 5b2cb8e38ebc57b322a56e802df04d0c14a4e083 (diff) | |
Add smoke tests for a selection of iCE40, ECP5, Xilinx, Intel boards.
The purpose of these tests is just to ensure that Amaranth changes do
not blatantly break the boards repository. They are not intended to
exhaustively test even a single board.
Everything Gowin-related is removed due to Apicula's problematic use
of numpy.
Diffstat (limited to 'amaranth_boards')
| -rw-r--r-- | amaranth_boards/arty_a7.py | 7 | ||||
| -rw-r--r-- | amaranth_boards/de10_nano.py | 7 | ||||
| -rw-r--r-- | amaranth_boards/ice40_hx8k_b_evn.py | 9 | ||||
| -rw-r--r-- | amaranth_boards/ulx3s.py | 15 | ||||
| -rw-r--r-- | amaranth_boards/versa_ecp5.py | 9 |
5 files changed, 41 insertions, 6 deletions
diff --git a/amaranth_boards/arty_a7.py b/amaranth_boards/arty_a7.py index 3714b59..3ca94d2 100644 --- a/amaranth_boards/arty_a7.py +++ b/amaranth_boards/arty_a7.py @@ -1,5 +1,6 @@ import os import subprocess +import unittest from amaranth.build import * from amaranth.vendor import XilinxPlatform @@ -225,6 +226,12 @@ class ArtyA7_100Platform(_ArtyA7Platform): device = "xc7a100ti" +class TestCase(unittest.TestCase): + def test_smoke(self): + from .test.blinky import Blinky + ArtyA7_35Platform().build(Blinky(), do_build=False) + + if __name__ == "__main__": from .test.blinky import * ArtyA7_35Platform().build(Blinky(), do_program=True) diff --git a/amaranth_boards/de10_nano.py b/amaranth_boards/de10_nano.py index 41800ab..f342fd4 100644 --- a/amaranth_boards/de10_nano.py +++ b/amaranth_boards/de10_nano.py @@ -1,5 +1,6 @@ import os import subprocess +import unittest from amaranth.build import * from amaranth.vendor import IntelPlatform @@ -90,6 +91,12 @@ class DE10NanoPlatform(IntelPlatform): "--operation", "P;" + bitstream_filename + "@2"]) +class TestCase(unittest.TestCase): + def test_smoke(self): + from .test.blinky import Blinky + DE10NanoPlatform().build(Blinky(), do_build=False) + + if __name__ == "__main__": from .test.blinky import Blinky DE10NanoPlatform().build(Blinky(), do_program=True) diff --git a/amaranth_boards/ice40_hx8k_b_evn.py b/amaranth_boards/ice40_hx8k_b_evn.py index fa40c31..fae3e7c 100644 --- a/amaranth_boards/ice40_hx8k_b_evn.py +++ b/amaranth_boards/ice40_hx8k_b_evn.py @@ -1,5 +1,6 @@ import os import subprocess +import unittest from amaranth.build import * from amaranth.vendor import LatticeICE40Platform @@ -63,6 +64,12 @@ class ICE40HX8KBEVNPlatform(LatticeICE40Platform): subprocess.check_call([iceprog, "-S", bitstream_filename]) +class TestCase(unittest.TestCase): + def test_smoke(self): + from .test.blinky import Blinky + ICE40HX8KBEVNPlatform().build(Blinky(), do_build=False) + + if __name__ == "__main__": - from .test.blinky import * + from .test.blinky import Blinky ICE40HX8KBEVNPlatform().build(Blinky(), do_program=True) diff --git a/amaranth_boards/ulx3s.py b/amaranth_boards/ulx3s.py index ee84909..5a50bb2 100644 --- a/amaranth_boards/ulx3s.py +++ b/amaranth_boards/ulx3s.py @@ -2,6 +2,7 @@ import os import argparse import subprocess import shutil +import unittest from amaranth.build import * from amaranth.vendor import LatticeECP5Platform @@ -44,7 +45,7 @@ class _ULX3SPlatform(LatticeECP5Platform): Resource("button_right", 0, Pins("H16", dir="i"), Attrs(IO_TYPE="LVCMOS33", PULLMODE="DOWN")), # FTDI connection. - UARTResource(0, + UARTResource(0, rx="M1", tx="L4", rts="M3", dtr="N1", role="dce", attrs=Attrs(IO_TYPE="LVCMOS33") ), @@ -103,7 +104,7 @@ class _ULX3SPlatform(LatticeECP5Platform): Resource("diff_gpio", 1, DiffPairs("A10", "A11"), Attrs(IO_TYPE="LVCMOS33")), Resource("diff_gpio", 2, DiffPairs("A9", "B10"), Attrs(IO_TYPE="LVCMOS33")), Resource("diff_gpio", 3, DiffPairs("B9", "C10"), Attrs(IO_TYPE="LVCMOS33")), - + # HDMI (only TX, due to the top bank of ECP5 only supporting diff. outputs) Resource("hdmi", 0, Subsignal("cec", Pins("A18", dir="io"), @@ -177,16 +178,22 @@ class ULX3S_85F_Platform(_ULX3SPlatform): device = "LFE5U-85F" +class TestCase(unittest.TestCase): + def test_smoke(self): + from .test.blinky import Blinky + ULX3S_45F_Platform().build(Blinky(), do_build=False) + + if __name__ == "__main__": from .test.blinky import * - + variants = { '12F': ULX3S_12F_Platform, '25F': ULX3S_25F_Platform, '45F': ULX3S_45F_Platform, '85F': ULX3S_85F_Platform } - + # Figure out which FPGA variant we want to target... parser = argparse.ArgumentParser() parser.add_argument('variant', choices=variants.keys()) diff --git a/amaranth_boards/versa_ecp5.py b/amaranth_boards/versa_ecp5.py index df6a5c8..5fb0a05 100644 --- a/amaranth_boards/versa_ecp5.py +++ b/amaranth_boards/versa_ecp5.py @@ -1,5 +1,6 @@ import os import subprocess +import unittest from amaranth.build import * from amaranth.vendor import LatticeECP5Platform @@ -171,6 +172,12 @@ class VersaECP5Platform(LatticeECP5Platform): ]) +class TestCase(unittest.TestCase): + def test_smoke(self): + from .test.blinky import Blinky + VersaECP5Platform().build(Blinky(), do_build=False) + + if __name__ == "__main__": - from .test.blinky import * + from .test.blinky import Blinky VersaECP5Platform().build(Blinky(), do_program=True) |
