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authorwhitequark <whitequark@whitequark.org>2019-08-04 11:14:16 +0000
committerwhitequark <whitequark@whitequark.org>2019-08-04 11:21:50 +0000
commite701859a274430b88c17e77e3956fa1e435af5a7 (patch)
tree783a11f819bca7e9f783b332baaeb3da841d1b12 /nmigen_boards/dev/sram.py
parent78f3594de10e0ae780969a4f924b5f4e57881292 (diff)
Use Pins/DiffPairs(assert_width) where appropriate.
Diffstat (limited to 'nmigen_boards/dev/sram.py')
-rw-r--r--nmigen_boards/dev/sram.py6
1 files changed, 3 insertions, 3 deletions
diff --git a/nmigen_boards/dev/sram.py b/nmigen_boards/dev/sram.py
index 4e2cd91..4eb4eca 100644
--- a/nmigen_boards/dev/sram.py
+++ b/nmigen_boards/dev/sram.py
@@ -6,9 +6,9 @@ __all__ = ["SRAMResource"]
def SRAMResource(*args, cs, oe, we, a, d, dm=None, attrs=None):
io = []
- io.append(Subsignal("cs", PinsN(cs, dir="o")))
- io.append(Subsignal("oe", PinsN(oe, dir="o")))
- io.append(Subsignal("we", PinsN(we, dir="o")))
+ io.append(Subsignal("cs", PinsN(cs, dir="o", assert_width=1)))
+ io.append(Subsignal("oe", PinsN(oe, dir="o", assert_width=1)))
+ io.append(Subsignal("we", PinsN(we, dir="o", assert_width=1)))
io.append(Subsignal("a", Pins(a, dir="o")))
io.append(Subsignal("d", Pins(d, dir="io")))
if dm is not None: