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authorwhitequark <whitequark@whitequark.org>2019-08-04 11:14:16 +0000
committerwhitequark <whitequark@whitequark.org>2019-08-04 11:21:50 +0000
commite701859a274430b88c17e77e3956fa1e435af5a7 (patch)
tree783a11f819bca7e9f783b332baaeb3da841d1b12 /nmigen_boards/dev/uart.py
parent78f3594de10e0ae780969a4f924b5f4e57881292 (diff)
Use Pins/DiffPairs(assert_width) where appropriate.
Diffstat (limited to 'nmigen_boards/dev/uart.py')
-rw-r--r--nmigen_boards/dev/uart.py24
1 files changed, 12 insertions, 12 deletions
diff --git a/nmigen_boards/dev/uart.py b/nmigen_boards/dev/uart.py
index ba2c1b0..706e50c 100644
--- a/nmigen_boards/dev/uart.py
+++ b/nmigen_boards/dev/uart.py
@@ -7,20 +7,20 @@ __all__ = ["UARTResource", "IrDAResource"]
def UARTResource(*args, rx, tx, rts=None, cts=None, dtr=None, dsr=None, dcd=None, ri=None,
attrs=None):
io = []
- io.append(Subsignal("rx", Pins(rx, dir="i")))
- io.append(Subsignal("tx", Pins(tx, dir="o")))
+ io.append(Subsignal("rx", Pins(rx, dir="i", assert_width=1)))
+ io.append(Subsignal("tx", Pins(tx, dir="o", assert_width=1)))
if rts is not None:
- io.append(Subsignal("rts", Pins(rts, dir="o")))
+ io.append(Subsignal("rts", Pins(rts, dir="o", assert_width=1)))
if cts is not None:
- io.append(Subsignal("cts", Pins(cts, dir="i")))
+ io.append(Subsignal("cts", Pins(cts, dir="i", assert_width=1)))
if dtr is not None:
- io.append(Subsignal("dtr", Pins(dtr, dir="o")))
+ io.append(Subsignal("dtr", Pins(dtr, dir="o", assert_width=1)))
if dsr is not None:
- io.append(Subsignal("dsr", Pins(dsr, dir="i")))
+ io.append(Subsignal("dsr", Pins(dsr, dir="i", assert_width=1)))
if dcd is not None:
- io.append(Subsignal("dcd", Pins(dcd, dir="i")))
+ io.append(Subsignal("dcd", Pins(dcd, dir="i", assert_width=1)))
if ri is not None:
- io.append(Subsignal("ri", Pins(ri, dir="i")))
+ io.append(Subsignal("ri", Pins(ri, dir="i", assert_width=1)))
if attrs is not None:
io.append(attrs)
return Resource.family(*args, default_name="uart", ios=io)
@@ -31,12 +31,12 @@ def IrDAResource(number, *, rx, tx, en=None, sd=None, attrs=None):
# be specified, and it is mapped to a logic level en subsignal.
assert (en is not None) ^ (sd is not None)
io = []
- io.append(Subsignal("rx", Pins(rx, dir="i")))
- io.append(Subsignal("tx", Pins(tx, dir="o")))
+ io.append(Subsignal("rx", Pins(rx, dir="i", assert_width=1)))
+ io.append(Subsignal("tx", Pins(tx, dir="o", assert_width=1)))
if en is not None:
- io.append(Subsignal("en", Pins(en, dir="o")))
+ io.append(Subsignal("en", Pins(en, dir="o", assert_width=1)))
if sd is not None:
- io.append(Subsignal("en", PinsN(sd, dir="o")))
+ io.append(Subsignal("en", PinsN(sd, dir="o", assert_width=1)))
if attrs is not None:
io.append(attrs)
return Resource("irda", number, *io)