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authorwhitequark <whitequark@whitequark.org>2019-06-28 03:42:02 +0000
committerwhitequark <whitequark@whitequark.org>2019-06-28 03:42:02 +0000
commit9dbfb83cb345d53407431d48181052a75c8fc5c0 (patch)
tree3402a06cb9f5283f345aa10397705c25a627d4b7 /nmigen_boards/dev
parentb2af7361c1863c4b6699b21c4b06935edd3671b8 (diff)
[breaking-change] Factor out "irda" resource.
Diffstat (limited to 'nmigen_boards/dev')
-rw-r--r--nmigen_boards/dev/uart.py18
1 files changed, 17 insertions, 1 deletions
diff --git a/nmigen_boards/dev/uart.py b/nmigen_boards/dev/uart.py
index 27d1c81..df03bd1 100644
--- a/nmigen_boards/dev/uart.py
+++ b/nmigen_boards/dev/uart.py
@@ -1,7 +1,7 @@
from nmigen.build import *
-__all__ = ["UARTResource"]
+__all__ = ["UARTResource", "IrDAResource"]
def UARTResource(number, *, rx, tx, rts=None, cts=None, dtr=None, dsr=None, dcd=None, ri=None,
@@ -24,3 +24,19 @@ def UARTResource(number, *, rx, tx, rts=None, cts=None, dtr=None, dsr=None, dcd=
if attrs is not None:
io.append(attrs)
return Resource("uart", number, *io)
+
+
+def IrDAResource(number, *, rx, tx, en=None, sd=None, attrs=None):
+ # Exactly one of en (active-high enable) or sd (shutdown, active-low enable) should
+ # be specified, and it is mapped to a logic level en subsignal.
+ assert (en is not None) ^ (sd is not None)
+ io = []
+ io.append(Subsignal("rx", Pins(rx, dir="i")))
+ io.append(Subsignal("tx", Pins(rx, dir="o")))
+ if en is not None:
+ io.append(Subsignal("en", Pins(en, dir="o")))
+ if sd is not None:
+ io.append(Subsignal("en", PinsN(sd, dir="o")))
+ if attrs is not None:
+ io.append(attrs)
+ return Resource("irda", number, *io)