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authorRobin Ole Heinemann <robin.ole.heinemann@t-online.de>2020-07-17 15:28:48 +0200
committerwhitequark <whitequark@whitequark.org>2020-07-18 02:25:45 +0000
commitd9264bf03b1a7ddb71017a2885383c4cec777f53 (patch)
tree7c4e9f9cc86d00d3f46da71e5f38c310173dd958 /nmigen_boards/mercury.py
parentc379438d7f02437dee1ef0a395be0ec0e07926eb (diff)
mercury: fix SPI roles
Diffstat (limited to 'nmigen_boards/mercury.py')
-rw-r--r--nmigen_boards/mercury.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/nmigen_boards/mercury.py b/nmigen_boards/mercury.py
index c0bd107..98b1f7b 100644
--- a/nmigen_boards/mercury.py
+++ b/nmigen_boards/mercury.py
@@ -39,7 +39,7 @@ class MercuryPlatform(XilinxSpartan3APlatform):
# The serial interface and flash memory have a shared SPI bus.
# FPGA is secondary.
- SPIResource("spi_serial", 0, role="device",
+ SPIResource("spi_serial", 0, role="peripheral",
cs="P39", clk="P53", copi="P46", cipo="P51",
attrs=Attrs(IOSTANDARD="LVTTL"),
),
@@ -51,7 +51,7 @@ class MercuryPlatform(XilinxSpartan3APlatform):
),
# ADC over SPI- FPGA is primary.
- SPIResource("spi_adc", 0, role="host",
+ SPIResource("spi_adc", 0, role="controller",
cs="P12", clk="P9", copi="P10", cipo="P21",
attrs=Attrs(IOSTANDARD="LVTTL"),
),