diff options
| author | whitequark <whitequark@whitequark.org> | 2019-08-03 16:19:03 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2019-08-03 16:20:16 +0000 |
| commit | d5bea94b228b956cfd119af9415fbb0e3abc53ac (patch) | |
| tree | c39b98fa6809d889d419638dce691b1eb0f45c13 /nmigen_boards/tinyfpga_bx.py | |
| parent | bc2d42e451d7b866f0a28c1c3888a8b54ed219d2 (diff) | |
Update all boards to use default_clk.
Diffstat (limited to 'nmigen_boards/tinyfpga_bx.py')
| -rw-r--r-- | nmigen_boards/tinyfpga_bx.py | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/nmigen_boards/tinyfpga_bx.py b/nmigen_boards/tinyfpga_bx.py index 5db90cf..5e272cb 100644 --- a/nmigen_boards/tinyfpga_bx.py +++ b/nmigen_boards/tinyfpga_bx.py @@ -10,9 +10,10 @@ __all__ = ["TinyFPGABXPlatform"] class TinyFPGABXPlatform(LatticeICE40Platform): - device = "iCE40LP8K" - package = "CM81" - resources = [ + device = "iCE40LP8K" + package = "CM81" + default_clk = "clk16" + resources = [ Resource("clk16", 0, Pins("B2", dir="i"), Clock(16e6), Attrs(IO_STANDARD="SB_LVCMOS33")), @@ -29,7 +30,7 @@ class TinyFPGABXPlatform(LatticeICE40Platform): cs="F7", clk="G7", mosi="G6", miso="H7", wp="H4", hold="J8", attrs=Attrs(IO_STANDARD="SB_LVCMOS33")), ] - connectors = [ + connectors = [ Connector("gpio", 0, # Left side of the board # 1 2 3 4 5 6 7 8 9 10 11 12 13 @@ -50,4 +51,4 @@ class TinyFPGABXPlatform(LatticeICE40Platform): if __name__ == "__main__": from ._blinky import build_and_program - build_and_program(TinyFPGABXPlatform, "clk16") + build_and_program(TinyFPGABXPlatform) |