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authorwhitequark <whitequark@whitequark.org>2021-12-10 07:38:00 +0000
committerwhitequark <whitequark@whitequark.org>2021-12-10 08:30:37 +0000
commitb968cfade961a329c26035ef8bfdf3058e95a9f1 (patch)
tree94891b950cb0547868877027230ff09b9cb56d4a /nmigen_boards/upduino_v2.py
parentbd7fdd379d8b28f8b542f251a11ca28297e8fd6f (diff)
Rename nMigen to Amaranth HDL.
Diffstat (limited to 'nmigen_boards/upduino_v2.py')
-rw-r--r--nmigen_boards/upduino_v2.py33
1 files changed, 5 insertions, 28 deletions
diff --git a/nmigen_boards/upduino_v2.py b/nmigen_boards/upduino_v2.py
index aebb04c..c720c72 100644
--- a/nmigen_boards/upduino_v2.py
+++ b/nmigen_boards/upduino_v2.py
@@ -1,30 +1,7 @@
-import os
-import subprocess
+from amaranth_boards.upduino_v2 import *
+from amaranth_boards.upduino_v2 import __all__
-from nmigen.build import *
-from nmigen.vendor.lattice_ice40 import *
-from .resources import *
-from .upduino_v1 import UpduinoV1Platform
-
-__all__ = ["UpduinoV2Platform"]
-
-
-class UpduinoV2Platform(UpduinoV1Platform):
- # Mostly identical to the V1 board, but it has an integrated
- # programmer and a 12MHz oscillator which is NC by default.
- resources = UpduinoV1Platform.resources + [
- # Solder pin 12 to the adjacent 'J8' osc_out pin to enable.
- Resource("clk12", 0, Pins("12", dir="i"),
- Clock(12e6), Attrs(IO_STANDARD="SB_LVCMOS")),
- ]
-
- def toolchain_program(self, products, name):
- iceprog = os.environ.get("ICEPROG", "iceprog")
- with products.extract("{}.bin".format(name)) as bitstream_filename:
- subprocess.check_call([iceprog, bitstream_filename])
-
-
-if __name__ == "__main__":
- from .test.blinky import *
- UpduinoV2Platform().build(Blinky(), do_program=True)
+import warnings
+warnings.warn("instead of nmigen_boards.upduino_v2, use amaranth_boards.upduino_v2",
+ DeprecationWarning, stacklevel=2)