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| author | Andrew Clark <fl4shk@users.noreply.github.com> | 2020-07-03 20:02:33 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-07-04 01:02:33 +0000 |
| commit | 3d0f159b6d49c9313a0ec4f1860f29d8880ca62e (patch) | |
| tree | ff1400ab4496a0b6df9fb57cbece83f175c94cfc /nmigen_boards | |
| parent | 95c1760cc87770b9dba8997c08508541a8cbec95 (diff) | |
de0_cv: fix ba and cs pins of the SDRAM resource.
Diffstat (limited to 'nmigen_boards')
| -rw-r--r-- | nmigen_boards/de0_cv.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/nmigen_boards/de0_cv.py b/nmigen_boards/de0_cv.py index 756f757..3d62c13 100644 --- a/nmigen_boards/de0_cv.py +++ b/nmigen_boards/de0_cv.py @@ -77,8 +77,8 @@ class DE0CVPlatform(IntelPlatform): attrs=Attrs(io_standard="3.3-V LVTTL")), SDRAMResource(0, - clk="AB11", cke="R6", cs="G7", we="AB5", ras="AB6", cas="V6", - ba="B5 A4", a="W8 T8 U11 Y10 N6 AB10 P12 P7 P8 R5 U8 P6 R7", + clk="AB11", cke="R6", cs="U6", we="AB5", ras="AB6", cas="V6", + ba="T7 AB7", a="W8 T8 U11 Y10 N6 AB10 P12 P7 P8 R5 U8 P6 R7", dq="Y9 T10 R9 Y11 R10 R11 R12 AA12 AA9 AB8 AA8 AA7 V10 V9 U10 T9", dqm="U12 N8", attrs=Attrs(io_standard="3.3-V LVCMOS")), ] |