diff options
27 files changed, 146 insertions, 160 deletions
diff --git a/nmigen_boards/arty_a7.py b/nmigen_boards/arty_a7.py index 57fe765..ba4a9db 100644 --- a/nmigen_boards/arty_a7.py +++ b/nmigen_boards/arty_a7.py @@ -3,7 +3,7 @@ import subprocess from nmigen.build import * from nmigen.vendor.xilinx_7series import * -from .dev import * +from .resources import * __all__ = ["ArtyA7Platform"] diff --git a/nmigen_boards/atlys.py b/nmigen_boards/atlys.py index d70c6d0..080fecd 100644 --- a/nmigen_boards/atlys.py +++ b/nmigen_boards/atlys.py @@ -3,7 +3,7 @@ import textwrap from nmigen.build import * from nmigen.vendor.xilinx_spartan_3_6 import * -from .dev import * +from .resources import * __all__ = ["AtlysPlatform"] diff --git a/nmigen_boards/blackice.py b/nmigen_boards/blackice.py index 385401d..75c9ac9 100644 --- a/nmigen_boards/blackice.py +++ b/nmigen_boards/blackice.py @@ -3,7 +3,7 @@ import subprocess from nmigen.build import * from nmigen.vendor.lattice_ice40 import * -from .dev import * +from .resources import * __all__ = ["BlackIcePlatform"] diff --git a/nmigen_boards/blackice_ii.py b/nmigen_boards/blackice_ii.py index 86e381d..a679bda 100644 --- a/nmigen_boards/blackice_ii.py +++ b/nmigen_boards/blackice_ii.py @@ -3,7 +3,7 @@ import subprocess from nmigen.build import * from nmigen.vendor.lattice_ice40 import * -from .dev import * +from .resources import * __all__ = ["BlackIceIIPlatform"] diff --git a/nmigen_boards/dev/__init__.py b/nmigen_boards/dev/__init__.py deleted file mode 100644 index db4703f..0000000 --- a/nmigen_boards/dev/__init__.py +++ /dev/null @@ -1,5 +0,0 @@ -from .user import LEDResources, RGBLEDResource, ButtonResources, SwitchResources -from .uart import UARTResource -from .spi import SPIResource -from .flash import SPIFlashResources -from .sram import SRAMResource diff --git a/nmigen_boards/dev/flash.py b/nmigen_boards/dev/flash.py deleted file mode 100644 index 817b6d4..0000000 --- a/nmigen_boards/dev/flash.py +++ /dev/null @@ -1,38 +0,0 @@ -from nmigen.build import * - - -__all__ = ["SPIFlashResources"] - - -def SPIFlashResources(*args, cs, clk, mosi, miso, wp=None, hold=None, attrs=None): - resources = [] - - io_all = [] - if attrs is not None: - io_all.append(attrs) - io_all.append(Subsignal("cs", PinsN(cs, dir="o"))) - io_all.append(Subsignal("clk", Pins(clk, dir="o", assert_width=1))) - - io_1x = list(io_all) - io_1x.append(Subsignal("mosi", Pins(mosi, dir="o", assert_width=1))) - io_1x.append(Subsignal("miso", Pins(miso, dir="i", assert_width=1))) - if wp is not None and hold is not None: - io_1x.append(Subsignal("wp", PinsN(wp, dir="o", assert_width=1))) - io_1x.append(Subsignal("hold", PinsN(hold, dir="o", assert_width=1))) - resources.append(Resource.family(*args, default_name="spi_flash", ios=io_1x, - name_suffix="1x")) - - io_2x = list(io_all) - io_2x.append(Subsignal("dq", Pins(" ".join([mosi, miso]), dir="io", - assert_width=2))) - resources.append(Resource.family(*args, default_name="spi_flash", ios=io_2x, - name_suffix="2x")) - - if wp is not None and hold is not None: - io_4x = list(io_all) - io_4x.append(Subsignal("dq", Pins(" ".join([mosi, miso, wp, hold]), dir="io", - assert_width=4))) - resources.append(Resource.family(*args, default_name="spi_flash", ios=io_4x, - name_suffix="4x")) - - return resources diff --git a/nmigen_boards/dev/sd.py b/nmigen_boards/dev/sd.py deleted file mode 100644 index 8fdbcbe..0000000 --- a/nmigen_boards/dev/sd.py +++ /dev/null @@ -1,46 +0,0 @@ -from nmigen.build import * - - -__all__ = ["SDCardResources"] - - -def SDCardResources(*args, clk, cmd, dat0, dat1=None, dat2=None, dat3=None, - cd=None, wp=None, attrs=None): - resources = [] - - io_common = [] - if attrs is not None: - io_common.append(attrs) - if cd is not None: - io_common.append(Subsignal("cd", Pins(cd, dir="i", assert_width=1))) - if wp is not None: - io_common.append(Subsignal("wp", PinsN(wp, dir="i", assert_width=1))) - - io_native = list(io_common) - io_native.append(Subsignal("clk", Pins(clk, dir="o", assert_width=1))) - io_native.append(Subsignal("cmd", Pins(cmd, dir="o", assert_width=1))) - - io_1bit = list(io_native) - io_1bit.append(Subsignal("dat", Pins(dat0, dir="io", assert_width=1))) - if dat3 is not None: # works as electronic card detect - io_1bit.append(Subsignal("ecd", Pins(dat3, dir="i", assert_width=1))) - resources.append(Resource.family(*args, default_name="sd_card", ios=io_1bit, - name_suffix="1bit")) - - if dat1 is not None and dat2 is not None and dat3 is not None: - io_4bit = list(io_native) - io_4bit.append(Subsignal("dat", Pins(" ".join((dat0, dat1, dat2, dat3)), dir="io", - assert_width=4))) - resources.append(Resource.family(*args, default_name="sd_card", ios=io_4bit, - name_suffix="4bit")) - - if dat3 is not None: - io_spi = list(io_common) - io_spi.append(Subsignal("cs", PinsN(dat3, dir="io"))) # doubles as electronic card detect - io_spi.append(Subsignal("clk", Pins(clk, dir="o", assert_width=1))) - io_spi.append(Subsignal("mosi", Pins(cmd, dir="o", assert_width=1))) - io_spi.append(Subsignal("miso", Pins(dat0, dir="i", assert_width=1))) - resources.append(Resource.family(*args, default_name="sd_card", ios=io_spi, - name_suffix="spi")) - - return resources diff --git a/nmigen_boards/dev/spi.py b/nmigen_boards/dev/spi.py deleted file mode 100644 index 2d045bc..0000000 --- a/nmigen_boards/dev/spi.py +++ /dev/null @@ -1,33 +0,0 @@ -from nmigen.build import * - - -__all__ = ["SPIResource"] - - -def SPIResource(*args, cs, clk, mosi, miso, int=None, reset=None, attrs=None, role="host"): - assert role in ("host", "device") - - io = [] - if role == "host": - io.append(Subsignal("cs", PinsN(cs, dir="o"))) - io.append(Subsignal("clk", Pins(clk, dir="o", assert_width=1))) - io.append(Subsignal("mosi", Pins(mosi, dir="o", assert_width=1))) - io.append(Subsignal("miso", Pins(miso, dir="i", assert_width=1))) - else: # device - io.append(Subsignal("cs", PinsN(cs, dir="i", assert_width=1))) - io.append(Subsignal("clk", Pins(clk, dir="i", assert_width=1))) - io.append(Subsignal("mosi", Pins(mosi, dir="i", assert_width=1))) - io.append(Subsignal("miso", Pins(miso, dir="oe", assert_width=1))) - if int is not None: - if role == "host": - io.append(Subsignal("int", Pins(int, dir="i"))) - else: - io.append(Subsignal("int", Pins(int, dir="oe", assert_width=1))) - if reset is not None: - if role == "host": - io.append(Subsignal("reset", Pins(reset, dir="o"))) - else: - io.append(Subsignal("reset", Pins(reset, dir="i", assert_width=1))) - if attrs is not None: - io.append(attrs) - return Resource.family(*args, default_name="spi", ios=io) diff --git a/nmigen_boards/dev/sram.py b/nmigen_boards/dev/sram.py deleted file mode 100644 index 14e31ce..0000000 --- a/nmigen_boards/dev/sram.py +++ /dev/null @@ -1,20 +0,0 @@ -from nmigen.build import * - - -__all__ = ["SRAMResource"] - - -def SRAMResource(*args, cs, oe=None, we, a, d, dm=None, attrs=None): - io = [] - io.append(Subsignal("cs", PinsN(cs, dir="o", assert_width=1))) - if oe is not None: - # Asserted WE# deactivates the D output buffers, so WE# can be used to replace OE#. - io.append(Subsignal("oe", PinsN(oe, dir="o", assert_width=1))) - io.append(Subsignal("we", PinsN(we, dir="o", assert_width=1))) - io.append(Subsignal("a", Pins(a, dir="o"))) - io.append(Subsignal("d", Pins(d, dir="io"))) - if dm is not None: - io.append(Subsignal("dm", PinsN(dm, dir="o"))) # dm="LB# UB#" - if attrs is not None: - io.append(attrs) - return Resource.family(*args, default_name="sram", ios=io) diff --git a/nmigen_boards/ext/__init__.py b/nmigen_boards/extensions/__init__.py index e69de29..e69de29 100644 --- a/nmigen_boards/ext/__init__.py +++ b/nmigen_boards/extensions/__init__.py diff --git a/nmigen_boards/ext/pmod.py b/nmigen_boards/extensions/pmod.py index 331352c..331352c 100644 --- a/nmigen_boards/ext/pmod.py +++ b/nmigen_boards/extensions/pmod.py diff --git a/nmigen_boards/fomu_hacker.py b/nmigen_boards/fomu_hacker.py index 0ddfe49..37dda34 100644 --- a/nmigen_boards/fomu_hacker.py +++ b/nmigen_boards/fomu_hacker.py @@ -3,7 +3,7 @@ import subprocess from nmigen.build import * from nmigen.vendor.lattice_ice40 import * -from .dev import * +from .resources import * __all__ = ["FomuHackerPlatform"] diff --git a/nmigen_boards/ice40_hx1k_blink_evn.py b/nmigen_boards/ice40_hx1k_blink_evn.py index ae46f24..03d91a0 100644 --- a/nmigen_boards/ice40_hx1k_blink_evn.py +++ b/nmigen_boards/ice40_hx1k_blink_evn.py @@ -3,7 +3,7 @@ import subprocess from nmigen.build import * from nmigen.vendor.lattice_ice40 import * -from .dev import * +from .resources import * __all__ = ["ICE40HX1KBlinkEVNPlatform"] diff --git a/nmigen_boards/ice40_hx8k_b_evn.py b/nmigen_boards/ice40_hx8k_b_evn.py index ce55e81..46b0180 100644 --- a/nmigen_boards/ice40_hx8k_b_evn.py +++ b/nmigen_boards/ice40_hx8k_b_evn.py @@ -3,7 +3,7 @@ import subprocess from nmigen.build import * from nmigen.vendor.lattice_ice40 import * -from .dev import * +from .resources import * __all__ = ["ICE40HX8KBEVNPlatform"] diff --git a/nmigen_boards/icebreaker.py b/nmigen_boards/icebreaker.py index 2f3034c..cc2ddf9 100644 --- a/nmigen_boards/icebreaker.py +++ b/nmigen_boards/icebreaker.py @@ -3,7 +3,7 @@ import subprocess from nmigen.build import * from nmigen.vendor.lattice_ice40 import * -from .dev import * +from .resources import * __all__ = ["ICEBreakerPlatform"] diff --git a/nmigen_boards/icestick.py b/nmigen_boards/icestick.py index 763eaee..c6cdfe7 100644 --- a/nmigen_boards/icestick.py +++ b/nmigen_boards/icestick.py @@ -3,8 +3,7 @@ import subprocess from nmigen.build import * from nmigen.vendor.lattice_ice40 import * -from .dev import * -from .dev.uart import IrDAResource +from .resources import * __all__ = ["ICEStickPlatform"] diff --git a/nmigen_boards/kc705.py b/nmigen_boards/kc705.py index bc889de..149f866 100644 --- a/nmigen_boards/kc705.py +++ b/nmigen_boards/kc705.py @@ -3,7 +3,7 @@ import subprocess from nmigen.build import * from nmigen.vendor.xilinx_7series import * -from .dev import * +from .resources import * __all__ = ["KC705Platform"] diff --git a/nmigen_boards/mercury.py b/nmigen_boards/mercury.py index ea56249..85bfb1d 100644 --- a/nmigen_boards/mercury.py +++ b/nmigen_boards/mercury.py @@ -3,8 +3,7 @@ import subprocess from nmigen.build import * from nmigen.vendor.xilinx_spartan_3_6 import * -from .dev import * -from .dev.display import Display7SegResource +from .resources import * __all__ = ["MercuryPlatform"] diff --git a/nmigen_boards/numato_mimas.py b/nmigen_boards/numato_mimas.py index c094528..2e76c69 100644 --- a/nmigen_boards/numato_mimas.py +++ b/nmigen_boards/numato_mimas.py @@ -3,7 +3,7 @@ import subprocess from nmigen.build import * from nmigen.vendor.xilinx_spartan_3_6 import * -from .dev import * +from .resources import * __all__ = ["NumatoMimasPlatform"] diff --git a/nmigen_boards/resources/__init__.py b/nmigen_boards/resources/__init__.py new file mode 100644 index 0000000..531eb5e --- /dev/null +++ b/nmigen_boards/resources/__init__.py @@ -0,0 +1,4 @@ +from .display import * +from .interface import * +from .memory import * +from .user import * diff --git a/nmigen_boards/dev/display.py b/nmigen_boards/resources/display.py index 0431b58..0431b58 100644 --- a/nmigen_boards/dev/display.py +++ b/nmigen_boards/resources/display.py diff --git a/nmigen_boards/dev/uart.py b/nmigen_boards/resources/interface.py index 706e50c..7ab0518 100644 --- a/nmigen_boards/dev/uart.py +++ b/nmigen_boards/resources/interface.py @@ -1,7 +1,7 @@ from nmigen.build import * -__all__ = ["UARTResource", "IrDAResource"] +__all__ = ["UARTResource", "IrDAResource", "SPIResource"] def UARTResource(*args, rx, tx, rts=None, cts=None, dtr=None, dsr=None, dcd=None, ri=None, @@ -30,6 +30,7 @@ def IrDAResource(number, *, rx, tx, en=None, sd=None, attrs=None): # Exactly one of en (active-high enable) or sd (shutdown, active-low enable) should # be specified, and it is mapped to a logic level en subsignal. assert (en is not None) ^ (sd is not None) + io = [] io.append(Subsignal("rx", Pins(rx, dir="i", assert_width=1))) io.append(Subsignal("tx", Pins(tx, dir="o", assert_width=1))) @@ -40,3 +41,32 @@ def IrDAResource(number, *, rx, tx, en=None, sd=None, attrs=None): if attrs is not None: io.append(attrs) return Resource("irda", number, *io) + + +def SPIResource(*args, cs, clk, mosi, miso, int=None, reset=None, attrs=None, role="host"): + assert role in ("host", "device") + + io = [] + if role == "host": + io.append(Subsignal("cs", PinsN(cs, dir="o"))) + io.append(Subsignal("clk", Pins(clk, dir="o", assert_width=1))) + io.append(Subsignal("mosi", Pins(mosi, dir="o", assert_width=1))) + io.append(Subsignal("miso", Pins(miso, dir="i", assert_width=1))) + else: # device + io.append(Subsignal("cs", PinsN(cs, dir="i", assert_width=1))) + io.append(Subsignal("clk", Pins(clk, dir="i", assert_width=1))) + io.append(Subsignal("mosi", Pins(mosi, dir="i", assert_width=1))) + io.append(Subsignal("miso", Pins(miso, dir="oe", assert_width=1))) + if int is not None: + if role == "host": + io.append(Subsignal("int", Pins(int, dir="i"))) + else: + io.append(Subsignal("int", Pins(int, dir="oe", assert_width=1))) + if reset is not None: + if role == "host": + io.append(Subsignal("reset", Pins(reset, dir="o"))) + else: + io.append(Subsignal("reset", Pins(reset, dir="i", assert_width=1))) + if attrs is not None: + io.append(attrs) + return Resource.family(*args, default_name="spi", ios=io) diff --git a/nmigen_boards/resources/memory.py b/nmigen_boards/resources/memory.py new file mode 100644 index 0000000..809035c --- /dev/null +++ b/nmigen_boards/resources/memory.py @@ -0,0 +1,96 @@ +from nmigen.build import * + + +__all__ = ["SPIFlashResources", "SDCardResources", "SRAMResource"] + + +def SPIFlashResources(*args, cs, clk, mosi, miso, wp=None, hold=None, attrs=None): + resources = [] + + io_all = [] + if attrs is not None: + io_all.append(attrs) + io_all.append(Subsignal("cs", PinsN(cs, dir="o"))) + io_all.append(Subsignal("clk", Pins(clk, dir="o", assert_width=1))) + + io_1x = list(io_all) + io_1x.append(Subsignal("mosi", Pins(mosi, dir="o", assert_width=1))) + io_1x.append(Subsignal("miso", Pins(miso, dir="i", assert_width=1))) + if wp is not None and hold is not None: + io_1x.append(Subsignal("wp", PinsN(wp, dir="o", assert_width=1))) + io_1x.append(Subsignal("hold", PinsN(hold, dir="o", assert_width=1))) + resources.append(Resource.family(*args, default_name="spi_flash", ios=io_1x, + name_suffix="1x")) + + io_2x = list(io_all) + io_2x.append(Subsignal("dq", Pins(" ".join([mosi, miso]), dir="io", + assert_width=2))) + resources.append(Resource.family(*args, default_name="spi_flash", ios=io_2x, + name_suffix="2x")) + + if wp is not None and hold is not None: + io_4x = list(io_all) + io_4x.append(Subsignal("dq", Pins(" ".join([mosi, miso, wp, hold]), dir="io", + assert_width=4))) + resources.append(Resource.family(*args, default_name="spi_flash", ios=io_4x, + name_suffix="4x")) + + return resources + + +def SDCardResources(*args, clk, cmd, dat0, dat1=None, dat2=None, dat3=None, + cd=None, wp=None, attrs=None): + resources = [] + + io_common = [] + if attrs is not None: + io_common.append(attrs) + if cd is not None: + io_common.append(Subsignal("cd", Pins(cd, dir="i", assert_width=1))) + if wp is not None: + io_common.append(Subsignal("wp", PinsN(wp, dir="i", assert_width=1))) + + io_native = list(io_common) + io_native.append(Subsignal("clk", Pins(clk, dir="o", assert_width=1))) + io_native.append(Subsignal("cmd", Pins(cmd, dir="o", assert_width=1))) + + io_1bit = list(io_native) + io_1bit.append(Subsignal("dat", Pins(dat0, dir="io", assert_width=1))) + if dat3 is not None: # works as electronic card detect + io_1bit.append(Subsignal("ecd", Pins(dat3, dir="i", assert_width=1))) + resources.append(Resource.family(*args, default_name="sd_card", ios=io_1bit, + name_suffix="1bit")) + + if dat1 is not None and dat2 is not None and dat3 is not None: + io_4bit = list(io_native) + io_4bit.append(Subsignal("dat", Pins(" ".join((dat0, dat1, dat2, dat3)), dir="io", + assert_width=4))) + resources.append(Resource.family(*args, default_name="sd_card", ios=io_4bit, + name_suffix="4bit")) + + if dat3 is not None: + io_spi = list(io_common) + io_spi.append(Subsignal("cs", PinsN(dat3, dir="io"))) # doubles as electronic card detect + io_spi.append(Subsignal("clk", Pins(clk, dir="o", assert_width=1))) + io_spi.append(Subsignal("mosi", Pins(cmd, dir="o", assert_width=1))) + io_spi.append(Subsignal("miso", Pins(dat0, dir="i", assert_width=1))) + resources.append(Resource.family(*args, default_name="sd_card", ios=io_spi, + name_suffix="spi")) + + return resources + + +def SRAMResource(*args, cs, oe=None, we, a, d, dm=None, attrs=None): + io = [] + io.append(Subsignal("cs", PinsN(cs, dir="o", assert_width=1))) + if oe is not None: + # Asserted WE# deactivates the D output buffers, so WE# can be used to replace OE#. + io.append(Subsignal("oe", PinsN(oe, dir="o", assert_width=1))) + io.append(Subsignal("we", PinsN(we, dir="o", assert_width=1))) + io.append(Subsignal("a", Pins(a, dir="o"))) + io.append(Subsignal("d", Pins(d, dir="io"))) + if dm is not None: + io.append(Subsignal("dm", PinsN(dm, dir="o"))) # dm="LB# UB#" + if attrs is not None: + io.append(attrs) + return Resource.family(*args, default_name="sram", ios=io) diff --git a/nmigen_boards/dev/user.py b/nmigen_boards/resources/user.py index 8faa736..8faa736 100644 --- a/nmigen_boards/dev/user.py +++ b/nmigen_boards/resources/user.py diff --git a/nmigen_boards/sk_xc6slx9.py b/nmigen_boards/sk_xc6slx9.py index ced857a..cec6d2f 100644 --- a/nmigen_boards/sk_xc6slx9.py +++ b/nmigen_boards/sk_xc6slx9.py @@ -3,7 +3,7 @@ import subprocess from nmigen.build import * from nmigen.vendor.xilinx_spartan_3_6 import * -from .dev import * +from .resources import * __all__ = ["SK_XC6SLX9Platform"] diff --git a/nmigen_boards/tinyfpga_bx.py b/nmigen_boards/tinyfpga_bx.py index 537d0fe..75de676 100644 --- a/nmigen_boards/tinyfpga_bx.py +++ b/nmigen_boards/tinyfpga_bx.py @@ -3,7 +3,7 @@ import subprocess from nmigen.build import * from nmigen.vendor.lattice_ice40 import * -from .dev import * +from .resources import * __all__ = ["TinyFPGABXPlatform"] diff --git a/nmigen_boards/versa_ecp5.py b/nmigen_boards/versa_ecp5.py index a3890ac..4847d9a 100644 --- a/nmigen_boards/versa_ecp5.py +++ b/nmigen_boards/versa_ecp5.py @@ -3,7 +3,7 @@ import subprocess from nmigen.build import * from nmigen.vendor.lattice_ecp5 import * -from .dev import * +from .resources import * __all__ = ["VersaECP5Platform"] |