| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2023-02-03 | Remove the deprecated `nmigen_boards` namespace. | Catherine | |
| 2021-12-10 | Rename nMigen to Amaranth HDL. | whitequark | |
| 2021-01-31 | ecpix-5: ddr3: Adjust IO_TYPE attribute to match VCCIO which is 1.5v for ↵ | Vadzim Dambrouski | |
| this board. This is not a functional change because both SSTL135 and SSTL15 generate identical bitcode. But it will hopefully prevent some confusion and will match the litex_boards config. | |||
| 2021-01-31 | ecpix-5: ddr3: Add missing address pin. | Vadzim Dambrouski | |
| 2021-01-31 | ecpix-5: ddr3: Add missing SLEWRATE="FAST" attribute | Vadzim Dambrouski | |
| 2020-11-26 | [breaking-change] Add `_n` suffix to argument names of pins with fixed ↵ | GuzTech | |
| inverters. Note: this change does NOT affect pin functionality or naming, and does not require modifying your design. It does however affect some board files, where keywords corresponding to active low pins will have to be adjusted: SPIResource(0, cs="C1", ...) → SPIResource(0, cs_n="C1", ...) The new naming scheme will make it easier to write and audit board files by clearly marking inverted pins in resource factories, similarly to how `PinsN` indicates the same in bare resources. Fixes #129. | |||
| 2020-08-03 | ecpix5: add termination attributes to DDR3 signals | Jean THOMAS | |
| 2020-07-16 | ecpix5: fix PMOD4 pins. | Jean-François Nguyen | |
| 2020-07-16 | [breaking-change] Update SPI pin names. | ECP5-PCIe | |
| The new names follow the OSHWA convention described at: https://www.oshwa.org/a-resolution-to-redefine-spi-signal-names/ | |||
| 2020-07-09 | Add ECPIX-5 support. | Jean-François Nguyen | |
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index : amaranth-boards | |
| Board definitions for Amaranth HDL |
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