amaranth-boards - Board definitions for Amaranth HDL

Age	Commit message (Collapse)	Author
2020-07-16	[breaking-change] Update SPI pin names.	ECP5-PCIe
	The new names follow the OSHWA convention described at: https://www.oshwa.org/a-resolution-to-redefine-spi-signal-names/
2020-07-02	[breaking-change] resources.memory: add missing inversion on SRAMResource(dm=).	whitequark
	The semantics should be that a high bit of data mask (UB#LB#) enables the write to the corresponding byte.
2019-10-13	resources.memory: fix typo.	whitequark

2019-10-11	resources: add conn= argument to every factory.	whitequark

2019-10-03	Fix typo in SDCardResources().	whitequark

2019-10-03	Factor out "nor_flash" resource.	whitequark

2019-10-03	Factor out "sdram" resource.	whitequark

2019-10-03	[breaking-change] Fix polarity of "dm" signal in "memory" resource.	whitequark
	LB# and UB# enable writing their corresponding byte. The "m" in "dm" means mask; that is, logical high masks (prevents) the byte from being written. This means that it should use Pins(), not PinsN(), to get the behavior implied by "mask".
2019-10-03	Reorganize resource taxonomy.	whitequark
	The current hierarchy isn't particularly well suited to resources like SDRAM or NOR flash, so make it much less fine-grained but easier to use and less nitpicky.