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path: root/nmigen_boards/versa_ecp5.py
AgeCommit message (Expand)Author
2023-02-03Remove the deprecated `nmigen_boards` namespace.Catherine
2021-12-10Rename nMigen to Amaranth HDL.whitequark
2020-11-26[breaking-change] Add `_n` suffix to argument names of pins with fixed invert...GuzTech
2020-08-15Use correct IO attribute for ECP5 FPGAsOguz Meteer
2020-08-07versa_ecp5: Fix DDR3 IO types, using the types from Lattice's DDR3 demo lpfJean THOMAS
2020-07-16[breaking-change] Update SPI pin names.ECP5-PCIe
2020-02-06versa_ecp5: fix switch{4..7} IO_TYPE.whitequark
2019-10-03Reorganize resource taxonomy.whitequark
2019-09-23_blinky→test.blinkywhitequark
2019-09-23[breaking-change] Factor out "led", "button" and "switch" resources.whitequark
2019-08-21versa_ecp5: prepare for switchable ECP5 toolchains.whitequark
2019-08-04Remove useless _blinky.build_and_program() function.whitequark
2019-08-03Update all boards to use default_rst.whitequark
2019-08-03Update all boards to use default_clk.whitequark
2019-08-03Replace subprocess.run(..., check=True) with subprocess.check_call().whitequark
2019-07-05versa_ecp5: add missing pin directions.whitequark
2019-06-28[breaking-change] Factor out "serial" resource and rename to "uart".whitequark
2019-06-25Add Versa ECP5/ECP5-5G support.whitequark