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| author | Clifford Wolf <clifford@clifford.at> | 2015-07-18 13:10:40 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2015-07-18 13:10:40 +0200 |
| commit | 48154cb6f452d3bdb4da36cc267b4b6c45588dc9 (patch) | |
| tree | 3ec3be9ef7e8db1fb7c764ed8202e0215a8eb7c7 /icefuzz/tests/lut_cascade.v | |
| parent | 13e63e6b65e044e348356731b55610d02cb308b9 (diff) | |
Imported full dev sources
Diffstat (limited to 'icefuzz/tests/lut_cascade.v')
| -rw-r--r-- | icefuzz/tests/lut_cascade.v | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/icefuzz/tests/lut_cascade.v b/icefuzz/tests/lut_cascade.v new file mode 100644 index 0000000..fed55ba --- /dev/null +++ b/icefuzz/tests/lut_cascade.v @@ -0,0 +1,23 @@ +module top (input a, b, c, d, e, f, g, output y); + wire cascade; + + SB_LUT4 #( + .LUT_INIT(16'b 1100_1100_1100_1010) + ) src_lut ( + .O(cascade), + .I0(a), + .I1(b), + .I2(c), + .I3(d) + ); + + SB_LUT4 #( + .LUT_INIT(16'b 1000_0100_0010_0001) + ) dst_lut ( + .O(y), + .I0(e), + .I1(f), + .I2(cascade), + .I3(g) + ); +endmodule |
