diff options
| author | Clifford Wolf <clifford@clifford.at> | 2015-07-18 13:10:40 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2015-07-18 13:10:40 +0200 |
| commit | 48154cb6f452d3bdb4da36cc267b4b6c45588dc9 (patch) | |
| tree | 3ec3be9ef7e8db1fb7c764ed8202e0215a8eb7c7 /icefuzz/tests/sb_io.v | |
| parent | 13e63e6b65e044e348356731b55610d02cb308b9 (diff) | |
Imported full dev sources
Diffstat (limited to 'icefuzz/tests/sb_io.v')
| -rw-r--r-- | icefuzz/tests/sb_io.v | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/icefuzz/tests/sb_io.v b/icefuzz/tests/sb_io.v new file mode 100644 index 0000000..83a56cf --- /dev/null +++ b/icefuzz/tests/sb_io.v @@ -0,0 +1,64 @@ +`define CONN_INTERNAL_BITS + +`define PINTYPE 6'b010000 +// `define IOSTANDARD "SB_LVCMOS" +`define IOSTANDARD "SB_LVDS_INPUT" + +// The following IO standards are just aliases for SB_LVCMOS +// `define IOSTANDARD "SB_LVCMOS25_16" +// `define IOSTANDARD "SB_LVCMOS25_12" +// `define IOSTANDARD "SB_LVCMOS25_8" +// `define IOSTANDARD "SB_LVCMOS25_4" +// `define IOSTANDARD "SB_LVCMOS18_10" +// `define IOSTANDARD "SB_LVCMOS18_8" +// `define IOSTANDARD "SB_LVCMOS18_4" +// `define IOSTANDARD "SB_LVCMOS18_2" +// `define IOSTANDARD "SB_LVCMOS15_4" +// `define IOSTANDARD "SB_LVCMOS15_2" +// `define IOSTANDARD "SB_MDDR10" +// `define IOSTANDARD "SB_MDDR8" +// `define IOSTANDARD "SB_MDDR4" +// `define IOSTANDARD "SB_MDDR2" + +`ifdef CONN_INTERNAL_BITS +module top ( + inout pin, + input latch_in, + input clk_in, + input clk_out, + input oen, + input dout_0, + input dout_1, + output din_0, + output din_1 +); +`else +module top(pin); + inout pin; + wire latch_in = 0; + wire clk_in = 0; + wire clk_out = 0; + wire oen = 0; + wire dout_0 = 0; + wire dout_1 = 0; + wire din_0; + wire din_1; +`endif + SB_IO #( + .PIN_TYPE(`PINTYPE), + .PULLUP(1'b0), + .NEG_TRIGGER(1'b0), + .IO_STANDARD(`IOSTANDARD) + ) IO_PIN_I ( + .PACKAGE_PIN(pin), + .LATCH_INPUT_VALUE(latch_in), + .CLOCK_ENABLE(clk_en), + .INPUT_CLK(clk_in), + .OUTPUT_CLK(clk_out), + .OUTPUT_ENABLE(oen), + .D_OUT_0(dout_0), + .D_OUT_1(dout_1), + .D_IN_0(din_0), + .D_IN_1(din_1) + ); +endmodule |
